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MC68340 Datasheet(PDF) 316 Page - Freescale Semiconductor, Inc

Part # MC68340
Description  Integrated Processor with DMA User?셲 Manual
PDF  441 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 Datasheet(HTML) 316 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
7- 21
Bits 11–8, 6–4—Reserved
SUPV—Supervisor/User
The value of this bit has no affect on registers permanently defined as supervisor only.
1 = The serial module registers, which are defined as supervisor or user, reside in
supervisor data space and are only accessible from supervisor programs.
0 = The serial module registers, which are defined as supervisor or user, reside in
user data space and are accessible from either supervisor or user programs.
IARB3–IARB0—Interrupt Arbitration Bits
Each module that generates interrupts has an IARB field. These bits are used to
arbitrate for the bus in the case that two or more modules simultaneously generate an
interrupt at the same priority level. No two modules can share the same IARB value.
The reset value of the IARB field is $0, which prevents this module from arbitrating
during the interrupt acknowledge cycle. The system software should initialize the IARB
field to a value from $F (highest priority) to $1 (lowest priority).
7.4.1.2 INTERRUPT LEVEL REGISTER (ILR). The ILR contains the priority level for the
serial module interrupt request. When the serial module is enabled (i.e., the STP bit in the
MCR is cleared), this register can be read or written to at any time while in supervisor
mode.
ILR
$704
76543210
00000
IL2
IL1
IL0
RESET:
00000000
Read/Write
Supervisor Only
Bits 7–3—Reserved
IL2–IL0—Interrupt Level Bits
Each module that can generate interrupts has an interrupt level field. The priority level
encoded in these bits is sent to the CPU32 on the appropriate
IRQ
≈ signal. The CPU32
uses this value to determine servicing priority. The hardware reset value of $00 will not
generate any interrupts. See Section 5 CPU32 for more information.
7.4.1.3 INTERRUPT VECTOR REGISTER (IVR). The IVR contains the 8-bit vector
number of the interrupt. When the serial module is enabled (i.e., the STP bit in the MCR is
cleared), this register can be read or written to at any time while in supervisor mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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