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BSH104 Datasheet(PDF) 2 Page - NXP Semiconductors |
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BSH104 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 8 page ![]() 1997 Nov 26 2 Philips Semiconductors Objective specification N-channel enhancement mode MOS transistor BSH104 FEATURES • High-speed switching • No secondary breakdown • Direct interface to C-MOS, TTL, etc. • Very low threshold. APPLICATIONS • ‘Glue-logic’: interface between logic blocks and/or periphery • Power management • DC to DC converters • General purpose switch • Battery powered applications. DESCRIPTION N-channel enhancement mode MOS transistor in a SOT23 SMD package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. PINNING PIN SYMBOL DESCRIPTION 1 g gate 2 s source 3 d drain Fig.1 Simplified outline (SOT23) and symbol. handbook, halfpage s d g MAM273 2 1 3 Top view QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − 12 V VSD source-drain diode forward voltage VGD = 0; IS = 0.5 A − 1V VGS gate-source voltage (DC) −±8V VGSth gate-source threshold voltage VDS =VGS; ID =1mA 0.4 − V ID drain current (DC) Ts =80 °C − 1.1 A RDSon drain-source on-state resistance VGS = 2.5 V; ID = 0.65 A − 0.3 Ω Ptot total power dissipation Ts =80 °C − 0.5 W |
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