AD5362BSTZ datasheet(17/25 Pages) AD

17 / 25 page

Preliminary Technical Data

AD5362/AD5363

Rev. P

rF | Page 17 of 25

Table 8. Control Register Monitor Functions

MON_OUT Disabled

MON_OUT Enabled

MON_OUT = VOUT0

MON_OUT = VOUT1

MON_OUT = VOUT7

MON_OUT = MON_IN0

MON_OUT = MON_IN1

The multiplexer is implemented as a series of analog switches.

Since this could conceivably cause a large amount of current to

flow from the input of the multiplexer, i.e. VOUTx or

MON_INx to the output of the multiplexer, MON_OUT, care

should taken to ensure that whatever is connected to the

MON_OUT pin is of high enough impedance to prevent the

Continuous Current Limit specification from being exceeded.

GPIO PIN

The AD5362/AD5363 has a general-purpose I/O pin, GPIO.

This can be configured as an input or an output and read back

or programmed (when configured as an output) via the serial

interface. Typical applications for this pin include monitoring

the status of a logic signal, limit switch, or controlling an

external multiplexer. The GPIO pin is configured by writing to

the GPIO register, which has the special function code of

0b001101 (see Table 11 and Table 13 ). When Bit F1 is set the

GPIO pin will be an output and F0 will determine whether the

pin is high or low. The GPIO pin can be set as an input by

writing 0 to both F1 and F0. The status of the GPIO pin can be

determined by initiating a read operation using the appropriate

bits in Table 14. The status of the pin will be indicated by the

LSB of the register read.

POWER-DOWN MODE

The AD5362/AD5363 can be powered down by setting Bit 0 in

the control register. This will turn off the DACs thus reducing

the current consumption. The DAC outputs will be connected

to their respective SIGGND potentials. The power-down mode

doesn’t change the contents of the registers and the DACs will

return to their previous voltage when the power-down bit is

cleared.

TEMPERATURE MONITORING

The AD5362/AD5363 can be programmed to power down the

DACs if the temperature on the die exceeds 130°C. Setting Bit 1

in the control register (see Table 13) will enable this function. If

the die temperature exceeds 130°C the AD5362/AD5363 will

enter a temperature power-down mode, which is equivalent to

setting the power-down bit in the control register. To indicate

that the AD5362/AD5363 has entered temperature shutdown

mode Bit 4 of the control register is set. The AD5362/AD5363

will remain in temperature shutdown mode, even if the die

temperature falls, until Bit 1 in the control register is cleared.

TOGGLE MODE

The AD5362/AD5363 has two X2 registers per channel, X2A

and X2B, which can be used to switch the DAC output between

two levels with ease. This approach greatly reduces the overhead

required by a micro-processor which would otherwise have to

write to each channel individually. When the user writes to

either the X1A ,X2A, M or C registers the calculation engine

will take a certain amount of time to calculate the appropriate

X2A or X2B values. If the application only requires that the

DAC output switch between two levels, such as a data generator,

any method which reduces the amount of calculation time

encountered is advantageous. For the data generator example

the user need only set the high and low levels for each channel

once, by writing to the X1A and X1B registers. The values of

X2A and X2B will be calculated and stored in their respective

registers. The calculation delay therefore only happens during

the setup phase, i.e. when programming the initial values. To

toggle a DAC output between the two levels it is only required

to write to the relevant A/B Select Register to set the MUX2

per register it is possible to update four channels with a single

write. Table 12 shows the bits that correspond to each DAC

output.

AD5362BSTZ Datasheet(PDF) 17 Page - Analog Devices

AD5362BSTZ Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL