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AD5371BBCZ Datasheet(PDF) 15 Page - Analog Devices |
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AD5371BBCZ Datasheet(HTML) 15 Page - Analog Devices |
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15 / 25 page ![]() Preliminary Technical Data AD5371 Rev. P rF | Page 15 of 25 OUTPUT AMPLIFIER As the output amplifiers can swing to 1.4 V below the positive supply and 1.4 V above the negative supply, this limits how much the output can be offset for a given reference voltage. For example, it is not possible to have a unipolar output range of 20V, since the maximum supply voltage is ±16.5 V. DAC CHANNEL OFFSET DAC CLR CLR CLR SIGGND SIGGND OUTPUT S1 S2 S3 R4 R1 R3 R5 R6 R2 CHECK VALUE OF R1 &R5 R1,R2,R3 = 20k Ω R4,R5 = 60k Ω R6 = 10k Ω 2049-0008 10k Ω Figure 11. Output Amplifier and Offset DAC Figure 11 shows details of a DAC output amplifier and its connections to the Offset DAC. On power up, S1 is open, disconnecting the amplifier from the output. S3 is closed, so the output is pulled to SIGGND (R1 and R2 are very much greater than R6). S2 is also closed to prevent the output amplifier being open-loop. If CLR is low at power-up, the output will remain in this condition until CLR is taken high. The DAC registers can be programmed, and the outputs will assume the programmed values when CLR is taken high. Even if CLR is high at power- up, the output will remain in the above condition until VDD > 6 V and VSS < -4 V and the initialization sequence has finished. The outputs will then go to their power-on default value. TRANSFER FUNCTION From the previous text, it can be seen that the output voltage of a DAC in the AD5371 depends on the value in the input register, the value of the M and C registers, and the offset from the Offset DAC. The transfer function is given by: Code applied to DAC from X1A or X1B register:- DAC_CODE = INPUT_CODE × (m+1)/214 + c - 213 DAC output voltage:- VOUT = 4 × VREF × (DAC_CODE – OFFSET_CODE )/214 +VSIGGND Notes DAC_CODE should be within the range of 0 to 16383. For 12 V span VREF = 3.0 V. For 20 V span VREF = 5.0 V. X1A, X1B default code = 5461 m = code in gain register - default code = 214 – 1. c = code in offset register - default code = 213. OFFSET_CODE is the code loaded to the offset DAC. It is multiplied by 4 in the transfer function as this DAC is a 14 bit device. On power up the default code loaded to the offset DAC is 5461 (0x1555). With a 3V reference this gives a span of -4 V to +8 V. REFERENCE SELECTION The AD5371 has three reference input pins. The voltage applied to the reference pins determines the output voltage span on VOUT0 to VOUT31. VREF0 determines the voltage span for VOUT0 to VOUT7 (Group 0) and VREF1 determines the voltage span for VOUT8 to VOUT15 (Group 1) and VREF2 determines the voltage span for VOUT16 to VOUT31 (Group 2 to Group 3). The reference voltage applied to each VREF pin can be different, if required, allowing the groups to have a different voltage spans. The output voltage range and span can be adjusted further by programming the offset and gain registers for each channel as well as programming the offset DACs. If the offset and gain features are not used (i.e. the m and c registers are left at their default values) the required reference levels can be calculated as follows: VREF = (VOUTmax – VOUTmin)/4 If the offset and gain features of the AD5371 are used, then the required output range is slightly different. The chosen output range should take into account the system offset and gain errors that need to be trimmed out. Therefore, the chosen output range should be larger than the actual, required range. The required reference levels can be calculated as follows: 1. Identify the nominal output range on VOUT. 2. Identify the maximum offset span and the maximum gain required on the full output signal range. 3. Calculate the new maximum output range on VOUT including the expected maximum offset and gain errors. 4. Choose the new required VOUTmax and VOUTmin, keeping the VOUT limits centered on the nominal values. Note that VDD and VSS must provide sufficient headroom. 5. Calculate the value of VREF as follows: VREF = (VOUTMAX – VOUTMIN)/4 Reference Selection Example Nominal Output Range = 12V (-4V to +8V) Offset Error = ±70mV Gain Error = ±3% SIGGND = AGND = 0V 1) Gain Error = ±3% => Maximum Positive Gain Error = +3% => Output Range incl. Gain Error = 12 + 0.03(12)=12.36V |
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