ISP1504CBS datasheet(13/84 Pages) PHILIPS

13 / 84 page

ISP1504A_ISP1504C_1

Product data sheet

Rev. 01 — 19 October 2006

13 of 84

NXP Semiconductors

ISP1504A; ISP1504C

ULPI HS USB OTG transceiver

To prevent electrical overstress, it is strongly recommended that you attach a series

resistor on the VBUS pin (RVBUS). RVBUS must not be attached when using the ISP1504

internal charge pump. For details, see Section 16.

7.9.12 REG3V3 and REG1V8

Regulator output voltage. These supplies are used to power the ISP1504 internal digital

and analog circuits, and must not be used to power external circuits.

For correct operation of the regulator, it is recommended that you connect REG3V3 and

REG1V8 to decoupling capacitors. For examples, see Section 16.

7.9.13 XTAL1 and XTAL2

XTAL1 is the crystal input, and XTAL2 is the crystal output. The allowed frequency on the

XTAL1 pin depends on the ISP1504 product version.

If the link requires a 60 MHz clock from the ISP1504, then either a crystal must be

attached, or a clock of the same frequency must be driven into XTAL1, with XTAL2 left

ﬂoating. If the link drives a 60 MHz clock into the CLOCK pin, then XTAL1 must be

connected to REG1V8, and XTAL2 must be left ﬂoating.

If a crystal is attached, it requires external load capacitors to GND on each terminal of the

crystal. For details, see Section 16.

If at any time the system wants to stop the clock on XTAL1, the link must ﬁrst put the

ISP1504 into low-power mode. The clock on XTAL1 must be restarted before low-power

mode is exited.

7.9.14 RESET_N

An active LOW asynchronous reset pin that resets all circuits in the ISP1504. The

ISP1504 contains an internal power-on reset circuit, and therefore using the RESET_N

pin is optional. If RESET_N is not used, it must be connected to VCC(I/O).

For details on using RESET_N, see Section 9.3.2.

7.9.15 DIR

ULPI direction output pin. Controls the direction of the data bus. By default, the ISP1504

holds DIR at LOW, causing the data bus to be an input. When DIR is LOW, the ISP1504

listens for data from the link. The ISP1504 pulls DIR to HIGH only when it has data to

send to the link, which is for one of two reasons:

• To send the USB receive data, RXCMD status updates and register read data to the

link.

• To block the link from driving the data bus during power-up, reset and low-power

mode (suspend).

The DIR pin can also be 3-stated by driving CHIP_SELECT_N to HIGH.

For details on DIR usage, refer to

UTMI+ Low Pin Interface (ULPI) Speciﬁcation Rev. 1.1.

ISP1504CBS Datasheet(PDF) 13 Page - NXP Semiconductors

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