LTM4643 datasheet(10/24 Pages) AD

10 / 24 page

LTM4710-1

Rev. 0

For more information www.analog.com

Output Voltage Programming

The PWM controller has an internal 0.5V reference volt-

age. As shown in the Block Diagram, a 10k (0.5% toler-

ance) internal feedback resistor is included in channel

1 only. The 10k resistor connects FB1 to VOSNS1, which

should be directly connected to the VOUT1 sense point.

10k external top feedback resistor is recommended for

VOUT2,3,4 if operating independently. Adding a resistor

RBOT from FB pin to the AGND pin programs the output

voltage (Equation 2).

(V)

OUT

= 0.5V •

10k +RBOT

RBOT

(2)

Input Decoupling Capacitors

Each channel of the LTM4710-1 module should be con-

nected to a low AC-impedance DC source. For the regula-

tor, at least 22µF input ceramic capacitor is recommended

for RMS ripple current decoupling. Bulk input capacitors

are needed when the input source impedance is com-

promised by long inductive leads, traces or not enough

source capacitance. The bulk capacitor can be an electro-

lytic aluminum capacitor or polymer capacitor.

Without considering the inductor current ripple, the

RMS current of the input capacitor can be estimated

with Equation 3.

ICIN(RMS) =

IOUT(MAX)

η%

• D •(1– D)

(3)

where η is the estimated efficiency of the power module.

Output Decoupling Capacitors

With an optimized high frequency, high bandwidth design,

only a 100μF low ESR output ceramic capacitor is required

for each channel to achieve low output voltage ripple and

a very good transient response. Additional output filter-

ing may be required by the system designer, if further

reduction of output ripples or dynamic transient spikes is

required. Table 10 shows a matrix of different output volt-

ages and output capacitors to minimize the voltage droop

and overshoot during a 2A (25%) load step transient.

The multiphase operation will reduce effective output ripple

as a function of the number of phases. Application Note 77

APPLICATIONS INFORMATION

discusses this noise reduction versus output ripple current

cancellation, but the output capacitance will be more a func-

tion of stability and transient response. The LTpowerCAD®

design tool is available to download on-line for output ripple,

stability and transient response analysis and calculating the

output ripple reduction as the number of phases implemented

increases by N times.

Mode of Operation

TheMODEpiniseitheraclockinputoraclockoutput.When

configured as clock input, it synchronizes the switching

frequency to an external clock (see Table 1).

The LTM4710-1 should operate in forced continuous

mode (FCM) for low-noise applications.

Table 1. LTM4710-1 Single Phase Configuration

RT PIN

CONNECTION

MODE

PIN CONNECTION

MODE OF

OPERATION

SWITCHING

FREQUENCY

VIN

Clock Input

Forced

Continuous

External

Clock

Float/Resistor

to AGND

Clock Output

Forced

Continuous

Programmed

Setting the Operating Frequency

The frequency can be programmed by tying a resistor

from RT to AGND pins (Equation 4).

RT = 1113 • f(SW)–1.64

(4)

where RT is in kΩ and fSW is the desired switching fre-

quency in MHz.

Thefrequencycanbeprogrammedtoswitchfrom1MHzto

5MHz. Table 2 shows the necessary RT value for a desired

switching frequency.

Table 2. SW Frequency vs RFREQ Value

fSW (MHz)

RT (kΩ)

1130

1.5

536

340

2.2

301

196

140

105

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