EVAL-AD7797EB datasheet(22/24 Pages) AD

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AD7796/AD7797

Rev. A | Page 22 of 24

GROUNDING AND LAYOUT

Because the analog input and reference input of the ADC are

differential, most of the voltages in the analog modulator are

common-mode voltages. The excellent common-mode reject-

ion of the part removes common-mode noise on these inputs.

The digital filter provides rejection of broadband noise on the

power supply, except at integer multiples of the modulator

sampling frequency. The digital filter also removes noise from

the analog and reference inputs provided that these noise

sources do not saturate the analog modulator. As a result, the

AD7796/AD7797 are more immune to noise interference than

conventional high resolution converters. However, because the

resolution of the AD7796/AD7797 is so high, and the noise

levels from the AD7796/AD7797 are so low, care must be taken

with regard to grounding and layout.

The printed circuit board that houses the AD7796/AD7797

should be designed such that the analog and digital sections are

separated and confined to certain areas of the board. A minimum

etch technique is generally best for ground planes because it

gives the best shielding.

It is recommended that the GND pins of the AD7796/AD7797

be tied to the AGND plane of the system. In any layout, it is

important that the user pay attention to the flow of currents in

the system, and ensure that the return paths for all currents are

as close as possible to the paths the currents took to reach their

destinations. Avoid forcing digital currents to flow through the

AGND sections of the layout.

The ground planes of the AD7796/AD7797 should be allowed

to run under the AD7796/AD7797 to prevent noise coupling.

The power supply lines to the AD7796/AD7797 should use as

wide a trace as possible to provide low impedance paths and

reduce the effects of glitches on the power supply line. Fast

switching signals such as clocks should be shielded with digital

ground to avoid radiating noise to other sections of the board,

and clock signals should never be run near the analog inputs.

Avoid crossover of digital and analog signals. Traces on

opposite sides of the board should run at right angles to each

other. This reduces the effects of feedthrough through the

board. A micro-strip technique is by far the best, but it is not

always possible with a double-sided board. In this technique,

the component side of the board is dedicated to ground planes,

while signals are placed on the solder side.

Good decoupling is important when using high resolution

ADCs. AVDD should be decoupled with 10 μF tantalum in

parallel with 0.1 μF capacitors to GND. DVDD should be

decoupled with 10 μF tantalum in parallel with 0.1 μF

capacitors to the system’s DGND plane, with the system’s

AGND to DGND connection being close to the AD7796/

AD7797. To achieve the best results from these decoupling

components, they should be placed as close as possible to the

device, ideally right up against the device. All logic chips should

be decoupled with 0.1 μF ceramic capacitors to DGND.

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