EV-2 datasheet(18/44 Pages) CIRRUS

18 / 44 page

Rev. 2.1

CobraNet™ EV-2

Configuring the FPGA

The FPGA is configured from data that is stored in the upper 16kbytes (0xC000-0xFFFF) of

the microcontroller’s Flash Program Memory. The microncontroller code for configuring the

FPGA uses express mode which writes byte-wide data to the FPGA. Refer to the Xilinx

Spartan XL family data sheet for more information on the express mode configuration

operation. The address used for writing configuration data is 0x8800.

Functional Discussion of FPGA Operation

Routing of Audio Data

The routing of audio data is achieved by a simple 8 to 1 multiplexing operation; for each

audio destination three data bits in an a register in the FPGA select the source. For

example, the three data bits in the D/A audio routing register determine which audio

source is selected to appear at the analog outputs (J401). Table 7 on page 18 shows the

definition of the data bits and the respective audio source.

microcontroller data bit

AD2

AD1

AD0

Audio Source

000

CM SSI 0

001

CM SSI 1

010

CM SSI 2

011

CM SSI 3

100

ADC

AES3 Input

ADC (low latency, Rev D only)

Otherwise same as ADC above.

111

Sine wave

Table 7: Definition of Audio Routing Register Bits

EV-2 Datasheet(PDF) 18 Page - Cirrus Logic