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74HC367 Datasheet(PDF) 7 Page - Nexperia B.V. All rights reserved

Part # 74HC367
Description  Hex buffer/line driver; 3-state
PDF  14 Pages
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Manufacturer  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved

74HC367 Datasheet(HTML) 7 Page - Nexperia B.V. All rights reserved

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Nexperia
74HC367; 74HCT367
Hex buffer/line driver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Fig. 8.
25 °C
-40 °C to +85 °C -40 °C to +125 °C
Symbol Parameter
Conditions
Min Typ Max
Min
Max
Min
Max
Unit
74HC367
nA to nY; see Fig. 6
[1]
VCC = 2.0 V
-
28
95
-
120
-
145
ns
VCC = 4.5 V
-
10
19
-
24
-
29
ns
VCC = 5.0 V; CL = 15 pF
-
8
-
-
-
-
-
ns
tpd
propagation
delay
VCC = 6.0 V
-
8
16
-
20
-
25
ns
nOE to nY; see Fig. 7
[1]
VCC = 2.0 V
-
44
150
-
190
-
225
ns
VCC = 4.5 V
-
16
30
-
38
-
45
ns
ten
enable time
VCC = 6.0 V
-
13
26
-
33
-
38
ns
nOE to nY; see Fig. 7
[1]
VCC = 2.0 V
-
55
150
-
190
-
225
ns
VCC = 4.5 V
-
20
30
-
38
-
45
ns
tdis
disable time
VCC = 6.0 V
-
16
26
-
33
-
38
ns
see Fig. 6
[1]
VCC = 2.0 V
-
14
60
-
75
-
90
ns
VCC = 4.5 V
-
5
12
-
15
-
18
ns
tt
transition time
VCC = 6.0 V
-
4
10
-
13
-
15
ns
CPD
power
dissipation
capacitance
per buffer; VI = GND to VCC [2]
-
30
-
-
-
-
-
pF
74HCT367
nA to nY; see Fig. 6
[1]
VCC = 4.5 V
-
14
25
-
31
-
38
ns
tpd
propagation
delay
VCC = 5.0 V; CL = 15 pF
-
11
-
-
-
-
-
ns
ten
enable time
nOE to nY; VCC = 4.5 V;
see Fig. 7
[1]
-
16
35
-
44
-
53
ns
tdis
disable time
nOE to nY; VCC = 4.5 V;
see Fig. 7
[1]
-
21
35
-
44
-
53
ns
tt
transition time VCC = 4.5 V; see Fig. 6
[1]
-
5
12
-
15
-
18
ns
CPD
power
dissipation
capacitance
per buffer;
VI = GND to VCC - 1.5 V
[2]
-
32
-
-
-
-
-
pF
[1] tpd is the same as tPHL and tPLH; ten is the same as tPZH and tPZL; tdis is the same as tPHZ and tPLZ; tt is the same as tTHL and tTLH.
[2] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC 2 x fo) = sum of outputs.
74HC_HCT367
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 24 February 2021
7 / 14



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