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74ALVT16823 Datasheet(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74ALVT16823 Datasheet(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 16 page ![]() Nexperia 74ALVT16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Table 9. Test data Input Load VEXT VI fi tW tr, tf CL RL tPHZ, tPZH tPLZ, tPZL tPLH, tPHL 3.0 V or VCC whichever is less ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6 V or VCC × 2 open 74ALVT16823 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 6 — 20 October 2020 12 / 16 |
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