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CS5535 Datasheet(PDF) 195 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535 Datasheet(HTML) 195 Page - National Semiconductor (TI)

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GLIU Register Descriptions (Continued)
5.1.2.2
P2D Base Mask KEL Descriptors (GLIU_P2D_BMK[x])
P2D Base Mask KEL Descriptor 0 (GLIU_P2D_BMK0)
P2D Base Mask KEL Descriptor 1 (GLIU_P2D_BMK1)
This is a special version of a P2D_BM descriptor to support routing the USB Keyboard Emulation Logic (KEL) native regis-
ters to the default port. The default port device on the CS5535 contains the KEL.
MSR Address
51010023h
Type
R/W
Reset Value
000000FF_FFF00000h
MSR Address
51010024h
Type
R/W
Reset Value
000000FF_FFF00000h
GLIU_P2D_BMK[x] Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
PDID1_BM
K
RSVD
PBASE_BMK
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
PBASE_BMK
PMASK_BMK
GLIU_P2D_BMK[x] Bit Descriptions
Bit
Name
Description
63:61
PDID1_BMK
Physical Descriptor Destination ID. Descriptor Destination ID. These bits define
which port to route the request to if it is a hit based on the other settings in this register.
000: Port 0 (GLIU)
100: Port 4 (DD)
001: Port 1 (GLPCI_SB)
101: Port 5 (ACC)
010: Port 2 (USBC2)
110: Port 6 (USBC1)
011: Port 3 (ATAC)
111: Port 7 (GLCP)
60
PCMP_BIZ_BMK
Physical Compare BIZZARO Flag. If set, bit 8 of the address must be low for a hit on
this descriptor.
59:40
RSVD
Reserved. Write as read.
39:20
PBASE_BMK
Physical Memory Address Base.These bits form the matching value against which
the masked value of the physical address bits [31:12] are directly compared. If a match
is found, then a hit is declared, depending on the setting of the BIZZARO flag compara-
tor.
19:0
PMASK_BMK
Physical Memory Address Mask.These bits are used to mask physical address bits
[31:12] for the purposes of this hit detection.



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