CS5535 datasheet(50/555 Pages) NSC

50 / 555 page

www.national.com

Revision 0.8

3.0

Global Concepts and Features

3.1

GEODELINK ARCHITECTURE OVERVIEW

The information in this section provides a basic under-

standing of the architecture used to internally connect

GeodeLink Devices. The actual existence of architecture is

generally invisible to the user and the system programmer.

National Semiconductor Core BIOS software provides all

GeodeLink initialization and support, including related

Model Specific Registers (MSRs). Additionally, this soft-

ware provides a Virtual PCI Configuration Space that

abstracts the architecture to industry standard interfaces.

From this interface, all GeodeLink devices appear in one

PCI multi-function configuration space header on the exter-

nal PCI bus.

3.1.1

Introduction

This component is based on the GeodeLink packet archi-

tecture. It consists of a set of GeodeLink Devices (GLDs)

and a GeodeLink Control Processor (GLCP) connected

through the GeodeLink Interface Unit (GLIU).

A simplified view of a GLIU connected with three generic

GLDs is illustrated in Figure 3-1. The following points are

relevant:

• All outputs from a GLD to the GLIU are registered.

• All outputs from the GLIU to a GLD are registered.

Furthermore, there are dedicated output registers for

each GLD.

• GLD inputs from the GLIU need not be registered but

they are buffered at the interface.

• All connections between the GLDs and GLIU are dedi-

cated point-to-point connections with one source and

one load. There are no TRI-STATE buses.

• The GLIU itself is a GLD and is always Port 0.

The GLIU implements the “bus”. Transactions between

GLDs and GLIUs are conducted with packets. The GLIU

accepts request packets from masters and routes them to

slaves. Similarly, slave response packets are routed back

to the master. The bus is non-blocking. Several requests

can be pending but order is guaranteed. Broadcasts are

not allowed. All packets have one source and one destina-

tion.

3.1.2

Routing

The Physical To Device (P2D) descriptors control the rout-

ing of the packets. The descriptors are initialized by soft-

ware at system setup. They establish the address map to

be used by the system. They associate a memory or I/O

address range with a GLIU port.

Figure 3-1. Simplified GLIU with Generic GeodeLink Devices

GLD1

GLD2

GLD3

P2D

ARB

Data

Mux

GLIU

RO - Request Out

DO - Data Out

RI - Request In

DI - Data In

HS - Handshake

P2D - Physical to Device Descriptors

ARB - Arbiter

CS5535 Datasheet(PDF) 50 Page - National Semiconductor (TI)

CS5535 Datasheet(HTML) 50 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL