CS5535 datasheet(415/555 Pages) NSC

415 / 555 page

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DMA Register Descriptions (Continued)

5.13.2.21 Post Code Display Register (POST_DISPLAY)

5.13.2.22 DMA Channel [3:0] Low Page (DMA_CH[x]_LO_PAGE)

DMA Channel 2 Low Page (DMA_CH2_LO_PAGE)

DMA Channel 3 Low Page (DMA_CH3_LO_PAGE)

DMA Channel 1 Low Page (DMA_CH1_LO_PAGE)

DMA Channel 0 Low Page (DMA_CH0_LO_PAGE)

I/O Address

080h

Type

R/W

Reset Value

00h

POST_DISPLAY Register Map

76543

210

POST_CODE

POST_DISPLAY Bit Descriptions

Bit

Name

Description

7:0

POST_CODE

Post Code Display Value. This register is the historical Port 80 that receives the POST

(Power-On Self-Test) codes reported during initialization. Typically used by the BIOS,

Port 80 may also be written to by any piece of executing software to provide status or

other information. The most recent value written to Port 80 is recorded in this register.

I/O Address

081h

Type

R/W

Reset Value

00h

I/O Address

082h

Type

R/W

Reset Value

00h

I/O Address

083h

Type

R/W

Reset Value

00h

I/O Address Offset

087h

Type

R/W

Reset Value

00h

DMA_CH[x]_LO_PAGE Register Map

76543

210

DMA_CH_LO_PAGE

DMA_CH[x]_LO_PAGE Bit Descriptions

Bit

Name

Description

7:0

DMA_CH_LO_PAGE

DMA Channel Low Page Value. Address bits [23:16].

CS5535 Datasheet(PDF) 415 Page - National Semiconductor (TI)

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