UPD6P9 datasheet(15/45 Pages) RENESAS

15 / 45 page

µPD6P9

Data Sheet U15144EJ1V1DS

3.5 Data Memory (RAM): 128

× 4 Bits

The data memory, which is a static RAM consisting of 32

× 4 bits × 4 pages, is used to retain processed data.

The data memory is sometimes processed in 8-bit units. R0 of page 0 can be used as the ROM data pointer.

RF of page 0 is also used as the ASR.

After reset, R0 of page 0 is cleared to 00H and R1 to RF of page 0 and pages 1 to 3 retain the previous data

(undefined when turning on the power).

Figure 3-4. Data Memory Configuration

Notes 1. Pages 0 to 3 can be switched using bits 0 and 1 of control register 0.

2. R0 of page 0 alternately functions as the ROM data pointer (refer to 3.6 Data Pointer (DP)).

3. RF of page 0 alternately functions as the PC address stack (refer to 3.3 Address Stack Register

(ASR (RF)).

R10

R00

R11

R01

R12

R02

R13

R03

R14

R04

R15

R05

R16

R06

R17

R07

R18

R08

R19

R09

R1A

R0A

R1B

R0B

R1C

R0C

R1D

R0D

R1E

R0E

R1F

R0F

→Note 2

→Note 3

R1n (higher 4 bits) R0n (lower 4 bits)

Pages 0 to 3

Note 1

UPD6P9 Datasheet(PDF) 15 Page - Renesas Technology Corp

UPD6P9 Datasheet(HTML) 15 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL