74ALVC125

Quad buffer/line driver; 3-state

Rev. 4 — 30 April 2021

Product data sheet

1. General description

The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state outputs

(nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin causes the outputs to

assume a high-impedance OFF-state.

2. Features and benefits

• Wide supply voltage range from 1.65 V to 3.6 V

• 3.6 V tolerant inputs/outputs

• CMOS low power consumption

• Direct interface with TTL levels (2.7 V to 3.6 V)

• Power-down mode

• Latch-up performance exceeds 250 mA

• Complies with JEDEC standards:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8B (2.7 V to 3.6 V)

• ESD protection:

• MM JESD22-A115-A exceeds 200 V

• HBM JESD22-A114E exceeds 2000 V

• Multiple package options

• Specified from -40 °C to +85 °C

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74ALVC125D

-40 °C to +85 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74ALVC125PW -40 °C to +85 °C

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74ALVC125BQ -40 °C to +85 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

SOT762-1