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UPD9930 Datasheet(PDF) 49 Page - Renesas Technology Corp

Part # UPD9930
Description  MOS INTEGRATED CIRCUIT
PDF  80 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD9930 Datasheet(HTML) 49 Page - Renesas Technology Corp

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µPD9930
47
Register address
TONCR
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
TNMODE
TNMODE
0
Single tone/dual tone specification
Single tone mode
TNP2
TNP1
TNP0
START
/STOP
1
Remarks
Dual tone mode
At reset
TNP2
0
Generation pattern selection
Continuous tone generation
0
31.25 ms tone, 31.25 ms no tone repeated
At reset
0
0
1
1
1
1
TNP1
0
0
1
1
0
0
1
1
TNP0
0
1
0
1
0
1
0
1
200 ms tone, 200 ms no tone repeated
250 ms tone, 250 ms no tone repeated
500 ms tone, 500 ms no tone repeated
1 s tone, 1s no tone repeated
GSM triple tone generatedNote 1
200 ms interval tone generated (one shot tone)
START/STOP
0
Tone generation/stop control
Stop ("1"
→ "0", "0" → "0" both valid)
1
Remarks
Validation of tone ferquency selection register setting data, start of
generation ("1"
→ "1", "0" → "1" both valid)
At reset
Remarks
Note 2
4.3.3 Tone Control Register (TONCR)
This is a 5-bit register for controlling single tone/dual tone specification, generation pattern selection, and
generation and stopping.
Figure 4-11 Tone Control Register
Notes 1. 950 Hz tone 333 ms, 1400 Hz tone 333 ms, 1800 Hz tone 333 ms, 1 s no tone repeated.
2. Do not input a command that sets a tone oscillation frequency after inputting a tone oscillation command
(writing "1" to the START/STOP control bit of the tone control register).
Remark When the regeneration pattern is specified as "110", it becomes GSM triple tone command, so tone
generation forcibly enters single tone mode.
Tone generation and change of a tone that is being generated is executed only when "1" is written for START/
STOP control bit (D0 bit) (refer to Figure 4-11 and Table 4-6).



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