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BUJ105AX Datasheet(PDF) 4 Page - NXP Semiconductors |
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BUJ105AX Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 7 page ![]() Philips Semiconductors Product specification Silicon Diffused Power Transistor BUJ105AX Fig.7. Normalised power dissipation. PD% = 100 ⋅PD/PD 25˚C = f (Ths) Fig.8. Typical DC current gain. h FE = f(IC) parameter V CE Fig.9. Typical DC current gain. h FE = f(IC) parameter V CE Fig.10. Collector-Emitter saturation voltage. Solid lines = typ values, V CEsat = f(IB); Tj=25˚C. Fig.11. Base-Emitter saturation voltage. Solid lines = typ values, V BEsat = f(IC); at IC/IB =4. Fig.12. Collector-Emitter saturation voltage. Solid lines = typ values, V CEsat = f(IC); at IC/IB =4. 0 20 40 60 80 100 120 140 Tmb / C PD% Normalised Power Derating 120 110 100 90 80 70 60 50 40 30 20 10 0 0.0 0.4 0.8 1.2 1.6 2.0 0.01 0.10 1.00 10.00 IB/A VCEsat/V IC=1A 2A 3A 4A 0.01 0.05 0.1 0.3 1 2 3 5 10 2 5 10 15 20 30 50 IC/A HFE Tj=100C 25C -40C VCE=1V 0.1 0.5 1 2 5 10 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 IC/A VBESAT/V Tj=100C -40C 25C 0.01 0.05 0.1 0.3 1 2 3 5 10 2 5 10 15 20 30 50 IC/A HFE Tj=100C 25C -40C VCE=5V 0.2 0.4 0.6 1 2 5 6 0 0.1 0.2 0.3 0.4 0.5 0.6 IC/A VCESAT/V Tj=100C -40C 25C February 1999 4 Rev 1.000 |
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