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UPD17062 Datasheet(PDF) 194 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 194 Page - Renesas Technology Corp |
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194 / 298 page ![]() 192 µPD17062 15.2.2 General-Purpose I/O Ports (P0A, P0B, P1B, P1C) The I/O of P0A is switched by the P0A bit I/O selection register (RF address 37H). The I/O of P0B is switched by the P0B bit I/O selection register (RF address 36H). The I/O of P1B is switched by the P1B bit I/O selection register (RF address 35H). And, the I/O of P1C is switched by the P1C group I/O selection register (RF address 27H). The I/O data of P0A is set by P0A (data memory address: 70H of BANK0 or BANK2) of the port register. The I/O data of P0B is set by P0B (data memory address: 71H of BANK0 or BANK2) of the port register. The I/O data of P1B is set by P1B (data memory address: 71H of BANK1) of the port register. And, the I/O data of P1C is set by P1C (data memory address: 72H of BANK1) of the port register. See Table 15-2. For details, see Section 15.3. 15.2.3 General-Purpose Input Port (P0D) P0D input data is read by P0D (data memory address: 73H of BANK0 or BANK2) of the port register. See Table 15-2. For details, see Section 15.4. 15.2.4 General-Purpose Output Ports (P0C, P1A) (1) P0C, P1A P0C and P1A output data is set by P0C (data memory address: 72H of BANK0 or BANK2) and P1A (data memory address: 70H of BANK1) of the port register. See Table 15-2. For details, see Section 15.5. |
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