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UPD75004 Datasheet(PDF) 39 Page - Renesas Technology Corp

Part # UPD75004
Description  MOS INTEGRATED CIRCUIT
PDF  68 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD75004 Datasheet(HTML) 39 Page - Renesas Technology Corp

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µPD75004, 75006, 75008
37
Ma-
Ad-
Instruc-
Mne-
Operand
Bytes
chine
Operation
dress-
Skip
tions
monics
Cyc-
ing
Conditions
les
Area
Incre-
INCS
reg
1
1+S
reg
← reg+1
reg = 0
ment/
@HL
2
2+S
(HL)
← (HL)+1
*1
(HL) = 0
Decre-
mem
2
2+S
(mem)
← (mem)+1
*3
(mem) = 0
ment
DECS
reg
1
1+S
reg
← reg-1
reg = FH
Compare SKE
reg, #n4
2
2+S
Skip if reg = n4
reg = n4
@HL, #n4
2
2+S
Skip if (HL) = n4
*1 (HL) = n4
A, @HL
1
1+S
Skip if A = (HL)
*1
A = (HL)
A, reg
2
2+S
Skip if A = reg
A = reg
Carry
SET1
CY
1
1
CY
← 1
flag
CLR1
CY
1
1
CY
← 0
Manipu- SKT
CY
1
1+S
Skip if CY = 1
CY = 1
lation
NOT1
CY
1
1
CY
← CY
Memory/ SET1
mem.bit
2
2
(mem.bit)
← 1*3
Bit
fmem.bit
2
2
(fmem.bit)
← 1
*4
Manipu-
pmem.@L
2
2
(pmem7-2 + L3-2.bit(L1-0))
← 1*5
lation
@H+mem.bit
2
2
(H + mem3-0.bit)
← 1*1
CLR1
mem.bit
2
2
(mem.bit)
← 0
*3
fmem.bit
2
2
(fmem.bit)
← 0
*4
pmem.@L
2
2
(pmem7-2 + L3-2.bit(L1-0))
← 0*5
@H+mem.bit
2
2
(H+mem3-0.bit)
← 0*1
SKT
mem.bit
2
2+S
Skip if (mem.bit) = 1
*3
(mem.bit) = 1
fmem.bit
2
2+S
Skip if (fmem.bit) = 1
*4
(fmem.bit) = 1
pmem.@L
2
2+S
Skip if (pmem7-2+L3-2.bit (L1-0)) = 1
*5
(pmem.@L) = 1
@H+mem.bit
2
2+S
Skip if (H + mem3-0.bit) = 1
*1
(@H+mem.bit) = 1
SKF
mem.bit
2
2+S
Skip if (mem.bit) = 0
*3
(mem.bit) = 0
fmem.bit
2
2+S
Skip if (fmem.bit) = 0
*4
(fmem.bit) = 0
pmem.@L
2
2+S
Skip if (pmem7-2 +L3-2.bit (L1-0)) = 0
*5
(pmem.@L) = 0
@H+mem.bit
2
2+S
Skip if (H + mem3-0.bit) = 0
*1
(@H+mem.bit) = 0
SKTCLR fmem.bit
2
2+S
Skip if (fmem.bit) = 1 and clear
*4
(fmem.bit) = 1
pmem.@L
2
2+S
Skip if (pmem7-2+L3-2.bit
*5
(pmem.@L) = 1
(L1-0)) = 1 and clear
@H+mem.bit
2
2+S
Skip if (H+mem3-0
.bit) = 1 and clear
*1
(@H+mem.bit) = 1
AND1
CY,fmem.bit
2
2
CY
← CY ∧ (fmem.bit)
*4
CY,pmem.@L
2
2
CY
← CY ∧ (pmem7-2+L3-2.bit(L1-0))
*5
CY,@H+mem.bit
2
2
CY
← CY ∧ (H+mem3-0.bit)
*1
OR1
CY,fmem.bit
2
2
CY
← CY ∨ (fmem.bit)
*4
CY,pmem.@L
2
2
CY
← CY ∨ (pmem7-2+L3-2.bit (L1-0))
*5
CY,@H+mem.bit
2
2
CY
← CY ∨ (H+mem3-0.bit)
*1
XOR1
CY,fmem.bit
2
2
CY
← CY ∨ (fmem.bit)
*4
CY,pmem.@L
2
2
CY
← CY ∨ (pmem7-2+L3-2.bit (L1-0))
*5
CY,@H+mem.bit
2
2
CY
← CY ∨ (H+mem3-0.bit)
*1



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