UPD77115 datasheet(13/58 Pages) RENESAS

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Data Sheet U14867EJ5V0DS

µPD77115, 77115A

• Serial interface

Pin No.

Pin Name

80-pin FBGA

80-pin TQFP

I/O

Function

Shared by:

SCK/BCLK

I/O

Serial clock input/output

SCK : Standard serial interface(input)

BCLK : Audio serial interface(I/O)

−

SOEN/LRCLK

I/O

Serial output enable / Left Right clock

input/output

SOEN : Standard serial interface(input)

LRCLK : Audio serial interface(I/O)

−

Output

(3S)

Serial data output

−

SIEN/MCLK

Input

Serial input enable / Master clock input

SIEN : Standard serial interface

MCLK : Audio serial interface (Master clock input

when master mode)

−

Input

Serial data input

−

Remark The pins marked “3S” under the heading “I/O” go into a high-impedance state on completion of data

transfer and input of the hardware reset (RESET) signal.

• SD card interface

Pin No.

Pin Name

80-pin FBGA

80-pin TQFP

I/O

Function

Shared by:

SDCLK

Output

SD card clock output

−

SDCR

I/O

(3S)

SD card command/response

Input : Response

Output : Command

•Leave pulled up.

−

SDDAT

I/O

(3S)

SD card data input/output

Input : Read data

Output : Write data

•Leave pulled up.

−

Remark The pins marked “3S” under the heading “I/O” go into a high-impedance state when the SD card

interface is not being accessed.

UPD77115 Datasheet(PDF) 13 Page - Renesas Technology Corp

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