12F683 datasheet(102/148 Pages) MICROCHIP

102 / 148 page

PIC12F683

DS41211B-page 100

Preliminary

 2004 Microchip Technology Inc.

MOVLW

Move Literal to W

Syntax:

[ label ]

MOVLW k

Operands:

≤ k ≤ 255

Operation:

→ (W)

Status Affected:

None

Encoding:

00xx

kkkk

Description:

The eight-bit literal ‘k’ is loaded into

the W register. The don’t cares will

assemble as ‘0’s.

Words:

Cycles:

Example:

MOVLW

0x5A

After Instruction

0x5A

MOVWF

Move W to f

Syntax:

[ label ]

MOVWF

Operands:

≤ f ≤ 127

Operation:

(W)

→ (f)

Status Affected: None

Encoding:

0000

1fff

ffff

Description:

Move data from W register to register ‘f’.

Words:

Cycles:

Example:

MOVWF

OPTION

Before Instruction

OPTION =

0xFF

0x4F

After Instruction

OPTION =

0x4F

NOP

No Operation

Syntax:

[ label ]

NOP

Operands:

None

Operation:

No operation

Status Affected:

None

Encoding:

0000

0xx0

0000

Description:

No operation.

Words:

Cycles:

Example:

NOP

IORLW

Inclusive OR Literal with W

Syntax:

[ label ]

IORLW k

Operands:

≤ k ≤ 255

Operation:

(W) .OR. k

→ (W)

Status Affected:

Description:

The contents of the W register are

OR’ed with the eight-bit literal ‘k’.

The result is placed in the W

IORWF

Inclusive OR W with f

Syntax:

[ label ]

IORWF

f,d

Operands:

≤ f ≤ 127

∈ [0,1]

Operation:

(W) .OR. (f)

→ (destination)

Status Affected:

Description:

Inclusive OR the W register with

placed in the W register. If ‘d’ is

‘1’, the result is placed back in

RETFIE

Return from Interrupt

Syntax:

[ label ]

RETFIE

Operands:

None

Operation:

TOS

→ PC, 1 → GIE

Status Affected: None

Encoding:

0000

1001

Description:

Return from interrupt. Stack is POPed

and Top-of-Stack (TOS) is loaded in the

PC. Interrupts are enabled by setting

Global Interrupt Enable bit, GIE

(INTCON<7>). This is a two-cycle

instruction.

Words:

Cycles:

Example:

RETFIE

After Interrupt

PC =

TOS

GIE =

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