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12F683 Datasheet(PDF) 115 Page - Microchip Technology |
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12F683 Datasheet(HTML) 115 Page - Microchip Technology |
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115 / 148 page ![]() 2004 Microchip Technology Inc. Preliminary DS41211B-page 113 PIC12F683 15.2 DC Characteristics: PIC12F683-I (Industrial) (Continued) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40 °C ≤ TA ≤ +85°C for industrial Param No. Sym Device Characteristics Min Typ† Max Units Conditions VDD Note D020 IPD Power-down Base Current(4) — 0.00099 TBD N/A 2.0 WDT, BOD, Comparator, VREF and T1OSC disabled — 0.0012 TBD N/A 3.0 —0.0029 TBD N/A 5.0 D021 — 1.8 TBD µA 2.0 WDT Current(3) —2.7 TBD µA3.0 —8.4 TBD µA5.0 D022 — 58 TBD µA 3.0 BOD Current(3) —109 TBD µA5.0 D023 — 18 TBD µA 2.0 Comparator Current(3) —28 TBD µA3.0 —60 TBD µA5.0 D024 — 58 TBD µA2.0 CVREF Current(3) —85 TBD µA3.0 —138 TBD µA5.0 D025 — 7.0 TBD µA 2.0 T1OSC Current(3) —8.6 TBD µA3.0 —10 TBD µA5.0 D026 — 1.2 TBD nA 3.0 A/D Current(3) —0.0029 TBD µA5.0 Legend: TBD = To Be Determined † Data in ‘Typ’ column is at 5.0V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to VDD; MCLR = VDD; WDT disabled. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: The peripheral current is the sum of the base IDD or IPD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max values should be used when calculating total current consumption. 4: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD. |
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