UPD98405 datasheet(23/68 Pages) RENESAS

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Data Sheet S12689EJ3V0DS

µµµµPD98405

<2>

PCI bus 64-bit expansion interface signals

Open AD63 to AD32, PCBE7_B to PCBE4_B, and PAR64 when using the 32-bit PCI bus interface.

Pin No.

Pin Name

QFP

FBGA

I/O

I/O Level

Function

AD63 to

AD32

69 to 71,

73 to 75, 79,

80,

82 to 85,

88 to 91,

94 to 97,

100 to 103,

106 to 109,

112 to 115

V2, V4, V5, Y1,

AA1, Y2, W4,

AB3, U6, W5,

AA5, AB4, V7,

AB5, AA6, AB6,

AA7, AB7, V8, U8,

AB8, W9, AA9,

AB9, W10, AA10,

AB10, V10, AA11,

AB11, W11, W12

I/O

3-state

PCI

Address/data.

AD63 to AD32 constitutes a 32-bit multiplexed

address/data bus that extends the PCI bus to 64 bits.

This address/data bus transfers the higher 32 bits of a

64-bit address in the address phase. It outputs the

higher 32 bits of 64-bit data in the data phase when

both REQ64_B and ACK64_B are asserted.

PCBE7_B

PCBE6_B

PCBE5_B

PCBE4_B

I/O

3-state

PCI

Bus command/byte enable.

These signals define a “bus command” (bus

transaction that occurs) in the address phase. In the

data phase, they indicate which byte lane holds valid

data. The PCBE7_B pin corresponds to AD63 to

AD56, and PCBE4_B pin corresponds to AD39 to

AD32.

PAR64

116

AB12

I/O

3-state

PCI

Parity 64.

This signal indicates an even parity on AD63 to AD32

and PCBE7_B to PCBE4_B pins, including the PAR64

signal. When the

µPD98405 is operating as a master,

the PAR signal becomes active in the address and

write data phases. When the

µPD98405 is operating

as a target, it becomes active in the read data phase.

REQ64_B

I/O

Sustained

3-state

PCI

Request 64.

This signal indicates the start and period of a 64-bit

bus transaction. When the

µPD98405 is operating as

a master, it asserts REQ64_B active to request 64-bit

data transfer. REQ64_B is the same as FRAME_B in

timing. Connect an external pull-up resistor when

using a 32-bit PCI bus.

ACK64_B

PCI

Acknowledge 64.

When the

µPD98405 is operating as a target, it makes

this signal low after the REQ64_B signal has been

asserted active and the

µPD98405 has recognized an

address. When the

µPD98405 is operating as a

master, it samples this signal to check whether the

target device has acknowledged 64-bit transfer.

ACK64_B is the same as DEVSEL_B in timing.

Connect an external pull-up resistor when using a 32-

bit PCI bus.

UPD98405 Datasheet(PDF) 23 Page - Renesas Technology Corp

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