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MAS9191A Datasheet(PDF) 15 Page - Micro Analog systems

Part # MAS9191A
Description  Single Chip AMPS/ETACS/NAMPS Audio/Data Processor
PDF  36 Pages
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Manufacturer  MAS [Micro Analog systems]
Direct Link  http://www.mas-oy.com
Logo MAS - Micro Analog systems

MAS9191A Datasheet(HTML) 15 Page - Micro Analog systems

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15
DA9191A.000
July 31, 1997
FUNCTIONS
◆ Data Transmission in Narrow Band mode
Reverse voice channel data format for narrow band.
DSAT/DST
Sync word
Data
DSAT/DST
24
30
40
24
Sync word = 011001010110101001100110100110
The data contains 36 data bits and 12 parity bits. The
transmitted data is 100 bits/sec Manchester code.
DSAT, DST and SYNC WORD are transmitted as
200 bits/sec NRZ code. The DSAT on the TX side is
similar to the DSAT on RX side. However, under
certain conditions the inverted DSAT, or DST (Digital
Signaling Tone), must be transmitted. The DST is
one of seven 24-bit digital sequences consisting of
the logical inverse of the seven DSAT sequences.
The conversions DSAT/ DST and DST/DSAT must
be made without disturbing the phase of the DSAT.
There is also a special 24-bit digital mask for each of
the seven sequences. The mask defines the first bit
to be inverted when converting from DSAT to DST
or vice versa. Only when the bit in the mask is one
can the polarity be changed.
DSAT
DST
MASK
0
2556CBHEX
DAA934HEX
FF003EHEX
1
255B2BHEX
DAA4D4HEX
0BBF82HEX
2
256A9BHEX
DA9564HEX
BD780FHEX
3
25AD4DHEX
DA52B2HEX
3FF118HEX
4
26AB2BHEX
D954D4HEX
0AE6F6HEX
5
26B2ADHEX
D94D52HEX
8001FFHEX
6
2669ABHEX
D69654HEX
1C0FCDHEX
MAS9191A does not include frame coding logic for
narrow band operation. The DSAT, DST, SYNC
WORD and DATA must be generated by micro
controller. The BCH function must also be performed
by the micro controller using the following algorithm:
G(x) = x
12 + x10 + x8 + x5 + x4 + x3 + x0
The generated bit sequence is written into shift
register 19HEX 8 bits at a time. While the next byte is
written to one of the 8-bit shift registers the other is
clocked out with a 200Hz clock. Each time the
contents of a shift register transmitted, the TXWRD
flag is set and an interrupt is generated. Note that
200 NRZ bits/second data has as many transitions
as 100 Manchester bits/second data.
8-bit
shift register
8-bit
shift register
F12
GC8
SRxD
SCL
SCL
200 Hz
200 Hz
Tx



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