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STA323W Datasheet(PDF) 41 Page - STMicroelectronics |
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STA323W Datasheet(HTML) 41 Page - STMicroelectronics |
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41 / 71 page ![]() STA323W Register descriptions 41/71 7.5 Configuration register D (address 0x03) 7.5.1 High-pass filter bypass The STA323W features an internal digital high-pass filter for DC blocking. The purpose of this filter is to prevent DC signals from passing through a DDX® amplifier. DC signals can cause speaker damage. 7.5.2 De-emphasis By setting this bit to 1, de-emphasis is implemented on all channels. DSPB (DSP Bypass, Bit D2, CFA) bit must be set to 0 for de-emphasis to function. 7.5.3 DSP bypass Setting the DSPB bit bypasses all the EQ and mixing functionality of the STA323W core. 7.5.4 Post-scale link D7 D6 D5 D4 D3 D2 D1 D0 MME ZDE DRC BQL PSL DSPB DEMP HPB 00 0 0 0 0 0 0 Table 29. High-pass filter bypass Bit R/W RST Name Description 0R/W 0 HPB 0: AC coupling high pass filter enabled 1: AC coupling high pass filter enabled Table 30. De-emphasis Bit R/W RST Name Description 1R/W 0 DEMP 0: no de-emphasis 1: de-emphasis Table 31. DSP bypass Bit R/W RST Name Description 2 R/W 0 DSPB 0: normal operation 1: bypass of EQ and mixing functionality Table 32. Post-scale link Bit R/W RST Name Description 3R/W 0 PSL 0: each channel uses individual post-scale value 1: each channel uses channel 1 post-scale value |
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