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STA323W Datasheet(PDF) 46 Page - STMicroelectronics |
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STA323W Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 71 page ![]() Register descriptions STA323W 46/71 When ECLE is active, it issues a power device power down signal (EAPD) on clock loss detection. EAPD is used to actively power down a connected DDX® power device. This register has to be written to 1 at start-up to enable the DDX® power device for normal operation. 7.8 Volume control 7.8.1 Master controls Master mute register (address 0x06) Master volume register (Address 0x07) Note: The value of volume derived from MVOL is dependent on the AMV Auto Mode Volume settings. 7.8.2 Channel controls Channel 1 volume (address 0x08) Table 47. Auto-EAPD on clock loss enable Bit R/W RST Name Description 7R/W 0 ECLE 0: disabled 1: enabled Table 48. External amplifier power down Bit R/W RST Name Description 7 R/W 0 EAPD 0: external power stage power down active 1: normal operation D7 D6 D5 D4 D3 D2 D1 D0 MMUTE 0 D7 D6 D5 D4 D3 D2 D1 D0 MV7 MV6 MV5 MV4 MV3 MV2 MV1 MV0 11 11 1 1 1 1 D7 D6 D5 D4 D3 D2 D1 D0 C1V7 C1V6 C1V5 C1V4 C1V3 C1V2 C1V1 C1V0 0 110 000 0 |
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