AD7401 datasheet(3/20 Pages) AD

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AD7401

Rev. A | Page 3 of 20

SPECIFICATIONS

VDD1 = 4.5 V to 5.25 V, VDD2 = 3 V to 5.5 V, VIN+ = −200 mV to +200 mV, and VIN− = 0 V (single-ended); TA = TMIN to TMAX,

fMCLK = 16 MHz maximum, tested with Sinc3 filter, 256 decimation rate, as defined by Verilog code, unless otherwise noted.

Table 1.

Parameter

Y Version1, 2

Unit

Test Conditions/Comments

STATIC PERFORMANCE

Resolution

Bits min

Filter output truncated to 16 bits

Integral Nonlinearity3

±15

LSB max

−40°C to +85°C; ±2 LSB typical; fMCLK = 20 MHz maximum4

±25

LSB max

>85°C to 105°C

±55

LSB max

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

Differential Nonlinearity3

±0.9

LSB max

Guaranteed no missed codes to 16 bits;

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

Offset Error3

±0.6

mV max

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

±50

μV typ

TA = 25°C

Offset Drift vs. Temperature3

3.5

μV/°C max

−40°C to +105°C

μV/°C typ

Offset Drift vs. VDD13

120

μV/V typ

Gain Error3

±1.6

mV max

−40°C to +85°C

±2

mV max

>85°C to 105°C

±1

mV typ

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

Gain Error Drift vs. Temperature3

μV/°C typ

−40°C to +105°C

Gain Error Drift vs. VDD13

110

μV/V typ

ANALOG INPUT

Input Voltage Range

±200

mV min/mV max

For specified performance; full range ±320 mV

Dynamic Input Current

±9

μA max

VIN+ = 400 mV, VIN− = 0 V

DC Leakage Current

±0.5

μA max

Input Capacitance

pF typ

DYNAMIC SPECIFICATIONS

VIN+ = 5 kHz, 400 mV p-p sine

Signal-to-(Noise + Distortion) Ratio (SINAD)3

dB min

−40°C to +85°C; fMCLK = 9 MHz to 20 MHz4

dB min

−40°C to +85°C; fMCLK = 5 MHz to <9 MHz

dB min

>85°C to 105°C

dB min

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

dB typ

Signal-to-Noise Ratio (SNR)3

dB min

−40°C to +105°C; 82 dB typ

dB min

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

Total Harmonic Distortion (THD)3

−92

dB typ

fMCLK = 20 MHz maximum4; VIN+ = −250 mV to +250 mV

Peak Harmonic or Spurious Noise (SFDR)3

−92

dB typ

Effective Number of Bits (ENOB)3

11.5

Bits

Isolation Transient Immunity3

kV/μs min

kV/μs typ

LOGIC INPUTS

Input High Voltage, VIH

0.8 × VDD2

V min

Input Low Voltage, VIL

0.2 × VDD2

V max

Input Current, IIN

±0.5

μA max

Input Capacitance, CIN5

pF max

LOGIC OUTPUTS

Output High Voltage, VOH

VDD2 − 0.1

V min

IO = −200 μA

Output Low Voltage, VOL

0.4

V max

IO = +200 μA

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