ATTINY26 datasheet(11/185 Pages) ATMEL

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ATtiny26(L)

1477I–AVR–10/06

Status Register – SREG

The AVR Status Register – SREG – at I/O space location $3F is defined as:

• Bit 7 – I: Global Interrupt Enable

The Global Interrupt Enable bit must be set (one) for the interrupts to be enabled. The

individual interrupt enable control is then performed in the Interrupt Mask Registers –

GIMSK and TIMSK. If the Global Interrupt Enable Register is cleared (zero), none of the

interrupts are enabled independent of the GIMSK and TIMSK values. The I-bit is cleared

by hardware after an interrupt has occurred, and is set by the RETI instruction to enable

subsequent interrupts. The I-bit can also be set and cleared by the application with the

SEI and CLI instructions, as described in the instruction set reference.

• Bit 6 – T: Bit Copy Storage

The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source

and destination for the operated bit. A bit from a register in the Register File can be cop-

ied into T by the BST instruction, and a bit in T can be copied into a bit in a register in the

• Bit 5 – H: Half Carry Flag

The Half Carry Flag H indicates a Half Carry in some arithmetic operations. See the

Instruction Set Description for detailed information.

• Bit 4 – S: Sign Bit, S = N

⊕ V

The S-bit is always an exclusive or between the Negative Flag N and the Two’s Comple-

ment Overflow Flag V. See the Instruction Set Description for detailed information.

• Bit 3 – V: Two’s Complement Overflow Flag

The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See

the Instruction Set Description for detailed information.

• Bit 2 – N: Negative Flag

The Negative Flag N indicates a negative result after the different arithmetic and logic

operations. See the Instruction Set Description for detailed information.

• Bit 1 – Z: Zero Flag

The Zero Flag Z indicates a zero result after the different arithmetic and logic opera-

tions. See the Instruction Set Description for detailed information.

• Bit 0 – C: Carry Flag

The Carry Flag C indicates a carry in an arithmetic or logic operation. See the Instruction

Set Description for detailed information.

Bit

765

432

$3F ($5F)

SREG

Read/Write

R/W

Initial Value

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