ATMEGA406_0607 datasheet(32/263 Pages) ATMEL

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2548E–AVR–07/06

ATmega406

• Bit 0 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

8.1

Idle Mode

When the SM2:0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode,

stopping the CPU but allowing all peripheral functions to continue operating. This sleep mode

basically halts clk

CPU and clkFLASH, while allowing the other clocks to run. Idle mode enables the

MCU to wake up from external triggered interrupts as well as internal ones like the Timer Over-

flow interrupt.

8.2

ADC Noise Reduction Mode

When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC

Noise Reduction mode, stopping the CPU but allowing the Voltage ADC (V-ADC), Wake-up

Timer (WUT), Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery Protection

(CBP), Voltage Battery Protection (VBP), Wake-up on Regular Current (WURC), 32 kHz crystal

Oscillator (XOSC_32K) or Slow RC Oscillator (RCOSC_SLOW), the ULTRA Low Power RC

Oscillator (RCOSC_ULP), and the Fast RC Oscillator (RCOSC_FAST) to continue operating.

This sleep mode basically halts clk

I/O, clkCPU, and clkFLASH, while allowing the other clocks to run.

This improves the noise environment for the Voltage ADC, enabling higher resolution

measurements.

8.3

Power-save Mode

When the SM2:0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-

save mode. In this mode, the internal Fast RC Oscillator (RCOSC_FAST) is stopped, while

Wake-up Timer (WUT), Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery Pro-

tection (CBP), Voltage Battery Protection (VBP), Wake-up on Regular Current (WURC), 32 kHz

crystal Oscillator (XOSC_32K) or Slow RC Oscillator (RCOSC_SLOW) and the Ultra Low Power

RC Oscillator (RCOSC_ULP) continue operating.

This mode will be the default mode when application software does not require operation of

CPU, Flash or any of the periphery units running at the Fast internal Oscillator (RCOSC_FAST).

If the current through the sense resistor is so small that the Coulomb Counter cannot measure it

accurately, Regular Current detection should be enabled to reduce power consumption. The

WUT keeps accurately track of the time so that battery self discharge can be calculated.

Note that if a level triggered interrupt is used for wake-up from Power-save mode, the changed

level must be held for some time to wake up the MCU. Refer to ”External Interrupts” on page 56

for details.

When waking up from Power-save mode, there is a delay from the wake-up condition occurs

until the wake-up becomes effective. This allows the clock to restart and become stable after

having been stopped. The wake-up period is defined in ”Clock Sources” on page 26.

ATMEGA406_0607 Datasheet(PDF) 32 Page - ATMEL Corporation

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