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AT83C5121 Datasheet(PDF) 49 Page - ATMEL Corporation |
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AT83C5121 Datasheet(HTML) 49 Page - ATMEL Corporation |
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49 / 115 page ![]() 49 A/T8xC5121 4164G–SCR–07/06 Table 32. IE0 Register Reset Value = 0XX0 0000b Bit addressable 76 54 32 1 0 EA - - ES ET1 EX1 ET0 EX0 Bit Number Bit Mnemonic Description 7EA Enable All interrupt bit Clear to disable all interrupts. Set to enable all interrupts. If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its interrupt enable bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4ES Serial port Enable bit Clear to disable serial port interrupt. Set to enable serial port interrupt. 3ET1 Timer 1 overflow interrupt Enable bit Clear to disable Timer 1 overflow interrupt. Set to enable Timer 1 overflow interrupt. 2 EX1 External interrupt 1 Enable bit Clear to disable external interrupt 1. Set to enable external interrupt 1. 1ET0 Timer 0 overflow interrupt Enable bit Clear to disable Timer 0 overflow interrupt. Set to enable Timer 0 overflow interrupt. 0 EX0 External interrupt 0 Enable bit Clear to disable external interrupt 0. Set to enable external interrupt 0. |
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