Philips Semiconductors

Product specification

GTL2005

Quad GTL/GTL+ to LVTTL/TTL

bidirectional non-latched translator

2

1999 Sep 17

853–2171 22353

FEATURES

LVTTL/TTL to GTL/GTL+ driver

1000 V CDM per JESD22-CC101

DESCRIPTION

The GTL2005 is a quad translating transceiver designed for 3.3 V

The direction pin allows the part to function as either a GTL to TTL

sampling receiver or as a TTL to GTL interface.

PIN CONFIGURATION

14

13

12

10

11

9

8

7

6

5

4

3

2

1

DIR

GND

B3

B2

GND

B1

B0

GND

A3

A2

GTLREF

A1

A0

SW00321

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

SYMBOL

PARAMETER

B to A

A to B

UNIT

Propagation delay

An to Bn or Bn to An

2.1

1.9

4.1

4.3

ns

Input capacitance DIR

3.0

3.0

pF

I/O pin capacitance

7.8

4.5

pF

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DWG NUMBER

14-Pin Plastic TSSOP Type II

–40

°C to +85°C

GTL2005 PW DH

SOT402-1

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

1

DIR

Direction control input

2, 3, 5, 6

A0 – A3

Data inputs/outputs (A side, GTL)

13, 12, 10, 9

B0 – B3

Data inputs/outputs (B side, TTL)

4

GTLREF

GTL reference voltage

7, 8, 11

GND

Ground (0 V)

14

Positive supply voltage

FUNCTION TABLE

INPUT

INPUT/OUTPUT

DIR

B

A

H

Inputs

Bn = An

L

An = Bn

Inputs

H = HIGH voltage level

L = LOW voltage level

LOGIC SYMBOL

A0

A1

A2

A3

B0

B1

B2

B3

GTLREF

DIR

SW00320