January 1995

2

Philips Semiconductors

Product specification

12-stage binary counter

HEF4040B

MSI

DESCRIPTION

The HEF4040B is a 12-stage binary ripple counter with a

clock input (CP), an overriding asynchronous master reset

The counter advances on the HIGH to LOW transition of

CP. A HIGH on MR clears all counter stages and forces all

outputs LOW, independent of CP. Each counter stage is a

static toggle flip-flop. Schmitt-trigger action in the clock

input makes the circuit highly tolerant to slower clock rise

and fall times.

Fig.1 Functional diagram.

HEF4040BP(N):

16-lead DIL; plastic

(SOT38-1)

HEF4040BD(F):

16-lead DIL; ceramic (cerdip)

(SOT74)

HEF4040BT(D):

16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

Fig.2 Pinning diagram.

PINNING

APPLICATION INFORMATION

Some examples of applications for the HEF4040B are:

• Frequency dividing circuits

• Time delay circuits

• Control counters

See Family Specifications

CP

clock input (HIGH to LOW edge-triggered)

MR

master reset input (active HIGH)

parallel outputs