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PCA8550 Datasheet(PDF) 5 Page - Texas Instruments |
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PCA8550 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 12 page ![]() www.ti.com I2C Interface Timing Requirements Switching Characteristics PCA8550 NONVOLATILE 5-BIT REGISTER WITH I2C INTERFACE SCPS050C – MARCH 1999 – REVISED MAY 2005 over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 3.3 V ± 0.3 V UNIT MIN MAX fscl I2C clock frequency 10 400 kHz tsch I2C clock high time 600 ns tscl I2C clock low time 1.3 µs tsp I2C spike time 0 50 ns tsds I2C serial data setup time 100 ns tsdh I2C serial data hold time 0 900 ns ticr I2C input rise time 20 300 ns ticf I2C input fall time 20 300 ns tocf I2C output fall time (10-pF to 400-pF bus) 20 + 0.1 Cb(1) 250 ns tbuf I2C bus free time between stop and start 1.3 µs tsts I2C start or repeated start condition setup 600 ns tsth I2C start or repeated start condition hold 600 ns tsps I2C stop condition setup 600 ns Cb(1) I2C bus capacitive load 400 pF (1) Cb = capacitance of one bus line in pF over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2) VCC = 3.3 V FROM TO ± 0.3 V PARAMETER UNIT (INPUT) (OUTPUT) MIN MAX tmpd Mux input to output propagation delay MUX IN MUX OUT 20 ns tsov MUX SELECT to output valid MUX SELECT Output valid 22 ns tovn OVERRIDE to NON-MUXED OUT output delay OVERRIDE NON-MUXED OUT 15 ns tovm OVERRIDE to MUX OUT output delay OVERRIDE MUX OUT 25 ns Falling edge of first valid data byte tsu Setup time WP 30 ns acknowledge on the SCL input Falling edge of first valid data byte th Hold time WP 120 ns acknowledge on the SCL input tr Output rise time 1 3 ns/V tf Output fall time 1 3 ns/V 5 |
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