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PCA8550 Datasheet(PDF) 3 Page - Texas Instruments

Part # PCA8550
Description  NONVOLATILE 5-BIT REGISTER WITH I2C INTERFACE
PDF  12 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCA8550 Datasheet(HTML) 3 Page - Texas Instruments

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I2C Interface
Absolute Maximum Ratings
(1)
PCA8550
NONVOLATILE 5-BIT REGISTER
WITH I2C INTERFACE
SCPS050C – MARCH 1999 – REVISED MAY 2005
I2C communication with this device is initiated by a master sending a start condition, a high-to-low transition on
the serial data (SDA) input/output while the serial clock (SCL) input is high. After the start condition, the device
address byte is sent, MSB first, including the data-direction bit (R/W). This device does not respond to the
general call address. After receiving the valid address byte, this device responds with an acknowledge, a low on
the SDA input/output during the high of the acknowledge-related clock pulse.
The data byte follows the address acknowledge. If the R/W bit is high, the data from this device are the values
read from the nonvolatile register. If the R/W bit is low, the data are from the master, to be written into the
register. A valid data byte is one in which the three high-order bits are low. The first valid data byte that is
received is written into the register, following the stop condition. If an invalid data byte is received, it is
acknowledged, but is not written into the register. The data byte is followed by an acknowledge sent from this
device. If other data bytes are sent from the master, following the acknowledge, they are ignored by this device.
A stop condition, a low-to-high transition on the SDA input/output while the SCL input is high, is sent by the
master. If the WP input is low during the falling edge of the first valid data byte acknowledge on the SCL input
and the R/W bit is low, the stop condition causes the I2C interface logic to write the data byte value into the
nonvolatile register. Data are written only if complete bytes are received and acknowledged. Writing to the
register takes time (twr), during which the device does not respond to its slave address. If the WP input is high,
the I2C interface logic does not write to the register.
I2C Interface Definition Table
BIT
BYTE
7 (MSB)
6
5
4
3
2
1
0 (LSB)
Address
H
L
L
H
H
H
L
R/W
NON-
Data
L
L
L
MUX OUT D
MUX OUT C
MUX OUT B
MUX OUT A
MUXED OUT
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
SDA(2)
–0.5
6.5
VO
Output voltage range
MUX OUT outputs(2)
–0.5
2.9
V
NON-MUXED OUT output(2)(3)
–0.5
VCC + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0 or VO > VCC(3)
–50, +10
mA
IIOK
Input/output clamp current
VO < 0
–50
mA
IO
Continuous output current
VO = 0 to VCC(3)
±15
mA
Continuous current through VCC or GND
±30
mA
D package
113
θ
JA
Package thermal impedance(4)
DB package
131
°C/W
PW package
149
Tstg
Storage temperature range
–65
85
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51.
3



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