83C694D datasheet(4/33 Pages) SMSC

4 / 33 page

1.0

INTRODUCTION

1.1

DOCUMENT SCOPE

This document describes the function and opera-

tion of the 83C694D Twisted-Pair Interface and

Manchester Encoder/Decoder. It includes a de-

scription of external logic necessary for the efficient

use of this device and its proper role in the chip set

which includes the 83C690 and 83B692 as shown

in Figure 1-1. Figure 1-2 provides a functional block

diagram of the 83C694D chip itself.

1.2

FEATURES

Features of the 83C694D include:

•

Twisted-Pair interface solution for IEEE 802.3

10BaseT Standard

•

Compatible with Ethernet II (10BASE5) and

Cheapernet (10BASE2) IEEE 802.3 Stand-

ards

•

Smart Squelch

and collision inputs to reject noise and digital

noise on twisted-pair receive inputs.

•

Direct connection to the transceiver (AUI) ca-

ble

•

16V fault protection at the AUI transmitter in-

terface

•

10 Mbps Manchester encoding/ decoding with

receive clock recovery

•

Low power, 1.25

µ CMOS technology

•

TTL/MOS-compatible controller interface

•

Externally-selectable half- or full-step modes

of operation at AUI TX

± outputs

•

Loopback capability for diagnostics

•

Single station interface operation

•

Link test generation and digital equalization for

twisted-pair transmitter

•

Automatic phase detection

•

AUI/TP autoselect

•

Built-in LED drivers for transmit, receive, link

test and polarity status indicators

1.3

GENERAL DESCRIPTION

The 83C694D is used for applications where

Twisted-Pair Interface (TPI) and/or Attachment Unit

Interface (AUI) functions are required. Its two main

functions are to:

Receive a digital data stream from a low-level

input signal and

Convert a digital output data stream into an

analog high-current signal for transmission

across a network cable.

This means that the 83C694D serves as the logical

link between a network cable on one end and a

digital controller chip (such as the 83C690) on the

other end.

To accomplish these two functions, the 83C694D

consists of these components: Manchester en-

coder/decoder, balanced drivers and receivers, on-

board crystal oscillator, signal translator, diagnostic

circuit, and protocol timers and state machines.

The remainder of this data sheet contains the fol-

lowing information:

Section 2 discusses the system architecture in-

cluding an explanation of all chip circuits.

Section 3 provides pin descriptions.

Section 4 provides DC Operating Characteristics.

Section 5 provides AC Operating Characteristics

including Interface Timing diagrams.

Section 6 provides the PLCC package diagram of

this chip.

INTRODUCTION

83C694D

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