EM6AA320 datasheet(11/17 Pages) ETRON

11 / 17 page

EtronTech

8Mx32 DDR SDRAM

EM6AA320

Rev 0.6

May 2006

Decoupling Capacitance Guide Line

Symbol

Parameter

Value

Unit

CDC1

Decouping Capacitance between VDD and VSS

0.1+0.01

CDC2

Decouping Capacitance between VDDQ and VSSQ

0.1+0.01

AC Input Operating Conditions

(VDD = 2.8V

± 5%, TA = 0~70 °C)

Symbol

Parameter

Min

Max

Unit

Note

VIH

Input High Voltage; DQ

VREF+0.4

VIL

Input Low Voltage; DQ

VREF-0.4

VID

Clock Input Differential Voltage; Ck & CK#

0.8

VDDQ+0.6

VIX

Clock Input Crossing Point Voltage; Ck & CK#

0.5xVDDQ-0.2

0.5xVDDQ+0.2

AC Operating Test Conditions

(VDD = 2.8V

± 5%, TA = 0~70 °C)

Reference Level of Output Signals (VRFE)

0.5 x VDDQ

CK & CK# signal maximum peak swing

1.5V

Output Load

See Figure. A Test Load

Input Signal Levels

VREF+0.4 V / VREF-0.4 V

Input Signals Slew Rate

1 V/ns

Input timing measurement reference level

VREF

Output timing measurement reference level

VTT

Reference Level of Input Signals

0.5 x VDDQ

Figure A. Test Load

Ω

DQ,DQS

30pF

VTT=0.5 x VDDQ

Z0=50 W

VREF=0.5 x VDDQ

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