EM78M680 datasheet(21/53 Pages) EMC

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Contents

Product Specification (V1.11) 02.10.2007

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6.2.1.14 RE (Interrupt Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

P77_IF

P76_IF

Reserved

Reserved RF2_High RF2_Low RF1_High RF1_Low

RE [0]

RF1_Low flag: Pattern Detection interruption flag. RF1 low pattern

compare flag.

RE [1]

RF1_High flag: Pattern Detection interruption flag. RF1 high pattern

compare flag.

RE [2]

RF2_Low flag: Pattern Detection interruption flag. RF2 low pattern

compare flag.

RE [3]

RF2_High flag: Pattern Detection interruption flag. RF2 high pattern

compare flag.

RE [4~5] Reserved. Do not use.

RE [6]

P76_IF: P76 State Change interruption flag.

RE [7]

P77_IF: P77 State Change interruption flag. The interrupt vector is in

0x0018 address.

6.2.1.15 RF (Interrupt Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

OUT EP_IF

−

Resume_IF

USBReset_IF Suspend_IF

EP0_IF

TCC_IF

RF [0]

TCC timer overflow interruption flag. It will be set while TCC timer

overflows, and is cleared by the firmware.

RF [1]

EndPoint Zero interruption flag. It will be set when the EM78M680

receives Vender /Customer Command to EndPoint Zero. This bit is

cleared by the firmware

RF [2]

USB Suspend interrupt flag: It will be set when the EM78M680 finds the

USB Suspend Signal on USB bus. This bit is cleared by the firmware.

RF [3]

USB Reset interrupt flag. It will be set when the Host issues the USB

Reset signal.

RF [4]

USB Host Resume interrupt flag. It will be set only under Dual clock

mode when the USB suspend signal becomes low.

RF [5~6] Not used and read as “0”.

RF [7]

OUT endpoint interrupt flag. It will be set when the fifo of outendpoint

has been received data from host.

Extra RAM0 :

6.2.1.16 R10 (USB Endpoint Status Register) : Default (0b0000_0000)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

−

EP5_ST

EP4_ST

EP3_ST

EP2_ST

EP1_ST

EM78M680 Datasheet(PDF) 21 Page - ELAN Microelectronics Corp

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