EM78M680 datasheet(16/53 Pages) EMC

16 / 53 page

Contents

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Product Specification (V1.11) 02.10.2007

6.2.1 Operational Registers

6.2.1.1

R0 (Indirect Address Register)

R0 is not a physically implemented register. It is used as an indirect addressing

pointer. Any instruction using R0 as register actually accesses data pointed by the

RAM Select Register (R4).

6.2.1.2

R1 (Timer/Clock Counter, TCC)

This register TCC, is an 8-bit timer or counter. It is incremented by the instruction

cycle clock, and is readable and writable as any other register.

6.2.1.3

R2 (Program Counter & Stack)

R2 and the hardware stacks are 13 bits wide.

The structure is depicted in Fig. 3.

Generates 6K

×13 on-chip ROM addresses to the relative programming

instruction codes. One program page is 1024 words long.

All the R2 bits are set to "0"s when a reset condition occurs.

"JMP" instruction allows direct loading of the lower 10 program counter bits.

Thus, "JMP" allows jump to any location on one page.

"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed

onto the stack. Thus, the subroutine entry address can be located anywhere

within a page

"RET" ("RETL k", "RETI") instruction loads the program counter with the

contents at the top of stack.

"MOV R2, A" allows the loading of an address from the "A" register to the lower

8 bits of PC, and the ninth and tenth bits (A8~A9) of PC are cleared.

"ADD R2, A" allows a relative address to be added to the current PC, and the

ninth and tenth bits of PC are cleared.

Any instruction that is written to R2 (e.g. "ADD R2, A", "MOV R2, A", "BC

R2,6",etc

⋅), except "TBL" will cause the ninth and tenth bits (A8~A9) of the PC to

be cleared. Thus, the computed jump is limited to the first 256 locations of any

program page.

"TBL" allows a relative address to be added to the current PC (R2+A

→R2),

and contents of the ninth and tenth bits (A8~A9) of the PC are not changed.

Thus, the computed jump can be on the second (third, or 4th) 256 locations on

one program page.

For the EM78M680, the most significant bits (A10~A12) will be loaded with the

contents of bits PS0~PS2 in the status register (R3) upon the execution of a

"JMP", "CALL", or any other instructions which writes to R2.

EM78M680 Datasheet(PDF) 16 Page - ELAN Microelectronics Corp

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