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L800BT90VC Datasheet(PDF) 48 Page - Advanced Micro Devices

Part # L800BT90VC
Description  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
PDF  49 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

L800BT90VC Datasheet(HTML) 48 Page - Advanced Micro Devices

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Am29LV800B
46
REVISION SUMMARY
Revision E (January 1998)
Distinctive Characteristics
Changed typical read and program/erase current
specifications.
Device now has a guaranteed minimum endurance of
1,000,000 write cycles.
In-System Sector Protect/Unprotect
Algorithm Figure
Corrected A6 to 0, Changed wait specification to 150
µs on sector protect and 15 ms on sector unprotect.
DC Characteristics
Changed typical read and program/erase current
specifications.
AC Characteristics
Alternate CE# Controlled Erase/Program Operations:
Changed tCP to 35 ns for 70R, 80, and 90 speed
options.
Erase and Programming Performance
Device now has a guaranteed minimum endurance of
1,000,000 write cycles.
Physical Dimensions
Corrected dimensions for package length and width in
FBGA illustration (standalone data sheet version).
Revision E+1 (March 1998)
In-System Sector Protect/Unprotect
Algorithms Figure
In the sector protect algorithm, added a “Reset
PLSCNT=1” box in the path from “Protect another
sector?” back to setting up the next sector address.
DC Characteristics
Changed Note 1 to indicate that OE# is at VIH for the
listed current.
AC Characteristics
Erase/Program Operations; Alternate CE# Controlled
Erase/Program Operations: Corrected the notes
reference for tWHWH1 and tWHWH2. These parameters
are 100% tested. Corrected the note reference for
tVCS. This parameter is not 100% tested.
Temporary Sector Unprotect Table
Added note reference for tVIDR. This parameter is not
100% tested.
Figure 23, Sector Protect/Unprotect
Timing Diagram
A valid address is not required for the first write cycle;
only the data 60h.
Erase and Programming Performance
In Note 2, the worst case endurance is now 1 million
cycles.
Revision F (January 1999)
Global
Changed references for process technology to “0.32
µm.”
Replaced the 70R ns regulated voltage speed option
with 70 ns full voltage speed option.
Distinctive Characteristics
Added 20-year data retention bullet.
Connection Diagrams
Reverse TSOP: Modified markings.
FBGA: Replaced Bump side (bottom) view with top
view.
Ordering Information
Valid Combinations for FBGA Packages: New Table.
DC Characteristics—CMOS Compatible
ICC1, ICC2, ICC3, ICC4, ICC5: Added Note 2 “Maximum
ICC specifications are tested with VCC = VCCmax”.
ICC3, ICC4: Deleted VCC = VCCmax.
Physical Dimensions
Changed package drawing to FBB048.
Revision F+1 (February 1999)
Physical Dimensions
Corrected ball grid layout on FBB048 drawing. Added
“048” to drawing title.
Revision F+2 (February 1999)
Distinctive Characteristics, Operating
Ranges
Corrected to indicate that the VCC voltage range for
all devices is 2.7–3.6 V.
Revision F+3 (July 2, 1999)
Global
Added references to availability of device in Known
Good Die (KGD) form.
Revision F+4 (July 26, 1999)
Global
Added the 70R speed option, which is available in the
extended temperature range.
Ordering Information
Deleted the extended temperature range from the
FBGA valid combinations.
Revision G (November 10, 1999)
Ordering Information
Deleted commercial and industrial temperature
ranges from the 70R speed option.



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