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CMP82C55AZ Datasheet(PDF) 10 Page - Intersil Corporation

Part # CMP82C55AZ
Description  CMOS Programmable Peripheral Interface
PDF  26 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CMP82C55AZ Datasheet(HTML) 10 Page - Intersil Corporation

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10
FN6140.2
June 15, 2006
ACK - (Acknowledge Input). A “low” on this input informs the
82C55A that the data from Port A or Port B is ready to be
accepted. In essence, a response from the peripheral device
indicating that it is ready to accept data, (See Note 1).
INTR - (Interrupt Request). A “high” on this output can be
used to interrupt the CPU when an output device has
accepted data transmitted by the CPU. INTR is set when
ACK is a “one”, OBF is a “one” and INTE is a “one”. It is reset
by the falling edge of WR.
INTE A
Controlled by Bit Set/Reset of PC6.
INTE B
Controlled by Bit Set/Reset of PC2.
NOTE:
1. To strobe data into the peripheral device, the user must operate
the strobe line in a hand shaking mode. The user needs to send
OBF to the peripheral device, generates an ACK from the
peripheral device and then latch data into the peripheral device
on the rising edge of OBF.
FIGURE 6. MODE 1 INPUT
FIGURE 7. MODE 1 (STROBED INPUT)
1
D7
0
D6
1
D5
1
D4
1/0
D3 D2 D1 D0
CONTROL WORD
MODE 1 (PORT A)
PC4
8
IBFA
PC5
INTE
A
PA7-PA0
STBA
INTRA
PC3
PC6, PC7
I/O
2
RD
PC6, PC7
1 = INPUT
0 = OUTPUT
1
D7 D6 D5 D4 D3 D2 D1 D0
CONTROL WORD
MODE 1 (PORT B)
PC2
8
IBFB
PC1
INTE
B
PB7-PB0
STBB
INTRB
PC0
RD
11
tST
STB
INTR
RD
INPUT FROM
IBF
PERIPHERAL
tSIB
tSIT
tPH
tPS
tRIT
tRIB
FIGURE 8. MODE 1 OUTPUT
1
D7
0
D6
1
D5
1
D4
1/0
D3 D2 D1 D0
CONTROL WORD
MODE 1 (PORT A)
PC7
8
ACKA
PC6
PA7-PA0
OBFA
INTRA
PC3
PC4, PC5
2
WR
PC4, PC5
1 = INPUT
0 = OUTPUT
1
D7 D6 D5 D4 D3 D2 D1 D0
CONTROL WORD
MODE 1 (PORT B)
PC1
8
ACKB
PC2
INTE
B
PB7-PB0
OBFB
INTRB
PC0
WR
10
INTE
A
MS82C55A, MQ82C55A, MP82C55A



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