OM4068HSLASH2 datasheet(18/28 Pages) PHILIPS

18 / 28 page

1998 Jun 18

Philips Semiconductors

Product speciﬁcation

LCD driver for low multiplex rates

OM4068

DC CHARACTERISTICS

VDD = 2.5 to 5.5 V; VSS =0V; VLCD = 3.5 to 6.5 V; Tamb = −40 to +105 °C; unless otherwise speciﬁed.

Notes

1. Power-down state. After power-on the chip is in power-down state as long as the serial clock is not activated. During

power-down all static currents are switched off except the power-on reset block.

2. Output SDOUT is open-circuit; inputs at VDD or VSS; bus inactive.

3. Drive mode: static, duplex and triplex.

4. LCD outputs are open-circuit, CL = 50 pF typical, inputs at VDD or VSS; bus inactive.

5. Resets all logic when VDD <VPOR.

6. Resistance of output terminal (S1 to S32 and BP1, BP2 and BP3) with a load current of 20

µA; outputs measured

one at a time.

7. LCD outputs open-circuits.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

VDD

supply voltage

VSS + 2.5

−

5.5

VLCD

LCD supply voltage

VSS + 3.5

−

6.5

IDD

supply current

power-down state;

note 1

−

410

µA

normal mode;

fosc = intern;

notes 2 and 3

−

µA

ILCD

VLCD current

power-down state;

note 1

−−

1.5

µA

normal mode;

fosc = intern;

notes 3 and 4

−−

µA

VPOR

power-on reset voltage level

note 5

0.8

1.25

1.6

Logic

VIL

LOW-level input voltage

VSS

−

0.3VDD

VIH

HIGH-level input voltage

0.7VDD

−

VDD

IOL

LOW-level output current (SDOUT)

VOL = 0.5 V; VDD = 5 V 1.0

−−

IOH

HIGH-level output current (SDOUT)

VOH =VDD − 0.5 V;

VDD =5V

−−

−1mA

Ipu

pull-up current M1 and M0

VI =VSS

0.04

0.15

µA

leakage current

VI =VDD or VSS

−1

−

µA

Segment and backplane outputs

R(o)seg

segment output resistance

SEG1 to SEG32

note 6

−

Ω

R(o)back

backplane output resistance

BP1 to BP3

note 6

−

Ω

Vseg(bias)(tol)

bias tolerance SEG1 to SEG32

note 7

−100

+100

Vback(bias)(tol) bias tolerance BP1, BP2 and BP3

note 7

−100

+100

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