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P90CL301 Datasheet(PDF) 4 Page - NXP Semiconductors |
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P90CL301 Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 92 page  1996 Dec 11 4 Philips Semiconductors Preliminary specification Low voltage 16-bit microcontroller P90CL301BFH (C100) 4 BLOCK DIAGRAM handbook, full pagewidth CPU 68000 RESET RAM 512 BYTES PORT TEST ROM data bus D15 to D0 address bus A31 to A0 WATCHDOG TIMER 2 × 16-BIT TIMERS 6 CHANNELS BUS INTERFACE BAUD RATE GENERATOR UART0 UART1 PWM I 2C-BUS INTERFACE SYSTEM CTRL 8-BIT ADC UART QUEUE A23 to A1 LDS UDS AS R/W D15 to D0 CP0 to CP5 TX0 RX0 TX1 RX1 PWM0 PWM1 SCL SDA VDDA VSSA Vref(A) ADC0 to ADC3 DTACK BSIZE HALT RESET RESETIN CLOCK XTAL1 INTERRUPTS INT0 to INT6 NMIN SP0 to SP7 P0 to P15 D15 to D0 A31 to A0 CSBT/ONCE CS0 to CS2 MGD780 CS3 to CS6 VSS2 VSS1 VDD3 VDD2 VDD1 Fig.1 P90CL301BFH block diagram. |
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