INA780BIDEKR datasheet(21/51 Pages) TI1

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6.5 Programming

6.5.1 I2C Serial Interface

The INA780x operates only as a target on both the SMBus and I2C interfaces. Connections to the bus are made

through the open-drain SDA and SCL lines. The SDA and SCL pins feature integrated spike suppression filters

and Schmitt triggers to minimize the effects of input spikes and bus noise. Although the device integrates spike

suppression into the digital I/O lines, proper layout techniques help minimize the amount of coupling into the

communication lines. This noise introduction can occur from capacitive coupling signal edges between the two

communication lines themselves or from other switching noise sources present in the system. Routing traces in

parallel with ground in between layers on a printed circuit board (PCB) typically reduces the effects of coupling

between the communication lines. Shielded communication lines reduce the possibility of unintended noise

coupling into the digital I/O lines that could be incorrectly interpreted as start or stop commands.

The INA780x supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1 kHz

to 2.94 MHz). All data bytes are transmitted most significant byte first and follow the SMBus 3.0 transfer protocol.

To communicate with the INA780x, the controller must first address targets through a target address byte. The

target address byte consists of seven address bits and a direction bit that indicates whether the action is to be a

read or write operation.

The device has two address pins, A0 and A1. Table 6-2 lists the pin logic levels for each of the 16 possible

addresses. The device samples the state of pins A0 and A1 on every bus communication. Establish the pin state

before any activity on the interface occurs. When connecting the SDA pin to either A0 or A1 to set the device

address, an additional hold time of 100 ns is required on the MSB of the I2C address to ensure correct device

addressing.

Table 6-2. Address Pins and Target Addresses

TARGET DEVICE ADDRESS

GND

1000000

GND

1000001

GND

SDA

1000010(1)

GND

SCL

1000011

GND

1000100

1000101

SDA

1000110(1)

SCL

1000111

SDA

GND

1001000(1)

SDA

1001001(1)

SDA

1001010(1)

SDA

SCL

1001011(1)

SCL

GND

1001100

SCL

1001101

SCL

SDA

1001110(1)

SCL

1001111

(1)

Any address using SDA will require an initial hold time of 100 ns on the MSB of the address.

6.5.1.1 Writing to and Reading Through the I2C Serial Interface

Accessing a specific register on the INA780x is accomplished by writing the appropriate value to the register

pointer. Refer to Register Maps for a complete list of registers and corresponding addresses. The value for the

bit low. Every write operation to the device requires a value for the register pointer.

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INA780A, INA780B

SBOSAB6A – JULY 2023 – REVISED DECEMBER 2023

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