Data Sheet

ADPA1113

THEORY OF OPERATION

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The ADPA1113 is a GaN power amplifier with cascaded gain stages

that is biased by a positive drain supply and an externally applied

negative gate voltage applied to the VGG1 pin. A nominal 28 V is

applied to the first, second, and third stages, and a negative voltage

is applied to VGG1 to set the total IDQ to 750 mA nominal.

When biased as described, the device operates in Class AB, result-

ing in the maximum PAE at saturation. The ADPA1113 features

integrated RF chokes for each drain plus on-chip DC blocking of

the RFIN and RFOUT ports. While the RFIN and RFOUT ports are

internally DC blocked, there is a DC path to ground on the RFIN

pin. As a result, if the DC bias level of the signal driving RFIN

is not equal to zero, then the DC bias level must be externally

AC-coupled.

Figure 45. Basic Block Diagram