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LTM4680 Datasheet(PDF) 16 Page - Analog Devices

Part # LTM4680
Description  Dual 25A or Single 50A μModule Regulator with Active Voltage Positioning
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4680 Datasheet(HTML) 16 Page - Analog Devices

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LTM4650-2
16
Rev. 0
For more information www.analog.com
APPLICATIONS INFORMATION
Figure 8. Example of Output Tracking Application Circuit
Minimum On-Time
Minimum on-time tON is the smallest time duration that the
LTM4650-2 is capable of turning on the top MOSFET on
either channel. It is determined by internal timing delays,
and the gate charge required turning on the top MOSFET.
Low-duty cycle applications may approach this minimum
on-time limit, and care should be taken to ensure that:
VOUT
VIN • FREQ
> tON(MIN)
If the duty cycle falls below what can be accommodated
by the minimum on time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the output ripple and current will increase. The on-time
can be increased by lowering the switching frequency. A
good rule of thumb is to keep on time longer than 110ns.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pins. The output can be tracked up and
down with another regulator. The main regulator’s output
is divided down with an external resistor divider that is
the same as the subordinate regulator’s feedback divider
to implement coincident tracking. The LTM4650-2 uses
an accurate 60.4k resistor internally for the top feedback
resistor for each channel. Figure 8 shows an example of
coincident tracking. The equation:
SUBORDINATE = 1+
60.4k
RTA
• VTRACK
VTRACK is the track ramp applied to the subordinate’s
track pin. VTRACK has a control range of 0V to 0.6V, or
the internal reference voltage. When the main’s output is
divided down with the same resistor values used to set the
subordinate’s output, then the subordinate will coincident
46502 F08
LTM4650-2
VIN
TEMP
RUN1
RUN2
TRACK1
TRACK2
fSET
C8
470µF
6.3V
RFB
60.4k
R2
10k
C6
100µF
6.3V
PHASMD
VOUT1
VOUTS1
SW1
VFB1
VFB2
COMP1
COMP2
VOUTS2
VOUT2
SW2
PGOOD2
MODE_PLLIN CLKOUT INTVCC EXTVCC PGOOD1
PGOOD
INTVCC
SGND
GND
1.5V
MAIN
RAMP TIME
tSOFTSTART = (CSS/1.3µA) • 0.6
DIFFP
DIFFN DIFFOUT
40.2k
4.02k
2200pF
PGOOD
SUBORDINATE
VOUT1
(MAIN)
1.5V, 25A
C7
470µF
6.3V
C5
100µF
6.3V
4.02k
2200pF
R4
121k
RTB
60.4k
4V TO 15V INTERMEDIATE BUS
R6
100k
CSS
0.1µF
C1
22µF
25V
RTA
60.4k
C2
22µF
25V
C3
22µF
25V
C4
22µF
25V
C10
4.7µF
R9
10k
INTVCC
VOUT2
(SUBORDINATE)
1.2V, 25A



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