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AS621x

Register Description

Datasheet

• PUBLIC

DS000677

• v4-00 • 2022-May-17

36

│ 24

ALERT / ADD1

Connection

ADD0 Connection

Alert

Functionality

Enabled

Device Address

(bin)

Device Address

(hex)

SCL

SCL

No

100 0111

0x47

VSS

VSS

No

100 1000

0x48

VSS

VDD

No

100 1001

0x49

VSS

SDA

No

100 1010

0x4A

VSS

SCL

No

100 1011

0x4B

Pull up to VDD

VSS

Yes

100 1000

0x48

Pull up to VDD

VDD

Yes

100 1001

0x49

Pull up to VDD

SDA

Yes

100 1010

0x4A

Pull up to VDD

SCL

Yes

100 1011

0x4B

6.3.4

Read/Write Operation

In order to access an internal data register, the index register must be written in advance. This register

contains the actual register address and selects the appropriate register for an access. A typical

transfer consists of the transmission of the slave address with a write operation indication, followed by

the transmission of the register address and is finalized with the actual register content data transfer.

This implies that every write operation to the temperature sensor device requires a value for the index

register prior to the transmission of the actual register data.

The index register defines the register address for both the write and read operation. Consequently, if

a read operation is executed, the register address is taken from the index register which was defined

from the last write operation.

If a different register needs to be read, the index register has to be written in advance to define the

new register address. This is accomplished by transmitting the slave address with a low R/W bit,

followed by the new content of the index register. Subsequently, the master provokes a START

condition on the bus and transmits the slave address with a high R/W bit in order to initiate a read

operation.

Since the index register always keeps its last value, reads can be executed repetitively on the same

register.

Similarly to the byte transfer where the MSB is transmitted first, the transfer of a 16-bit word is

executed by a two byte transfer whereas the MSB byte is always transmitted first.

6.3.5

Slave Operation

The device employs a slave functionality only (slave transmitter and slave receiver) and cannot be

operated as a bus master. Consequently, the device never actively drives the SCL line.