SC101161DT datasheet(121/142 Pages) FREESCALE

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Device User Guide — 9S12DT128DGV2/D V02.15

121

Freescale Semiconductor

Clock Monitor Failure is asserted if the frequency of the incoming clock signal is below the Assert

Frequency fCMFA.

A.5.3 Phase Locked Loop

The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)

is also the system clock source in self clock mode.

A.5.3.1 XFC Component Selection

This section describes the selection of the XFC components to achieve a good filter characteristics.

Table A-15 Oscillator Characteristics

Conditions are shown in (Table A-4) unless otherwise noted

Num C

Rating

Symbol

Min

Typ

Max

Unit

C Crystal oscillator range (Colpitts)

fOSC

0.5

MHz

C Crystal oscillator range (Pierce) 1

NOTES:

1. Depending on the crystal a damping series resistor might be necessary

fOSC

0.5

MHz

P Startup Current

iOSC

100

µA

C Oscillator start-up time (Colpitts)

tUPOSC

2. fosc = 4MHz, C = 22pF.

1003

3. Maximum value is for extreme cases using high Q, low frequency crystals

D Clock Quality check time-out

tCQOUT

0.45

2.5

P Clock Monitor Failure Assert Frequency

fCMFA

100

200

KHz

P External square wave input frequency 4

4. XCLKS =0 during reset

fEXT

0.5

MHz

D External square wave pulse width low

tEXTL

9.5

D External square wave pulse width high

tEXTH

9.5

D External square wave rise time

tEXTR

D External square wave fall time

tEXTF

D Input Capacitance (EXTAL, XTAL pins)

CIN

DC Operating Bias in Colpitts Conﬁguration on

EXTAL Pin

VDCBIAS

1.1

P EXTAL Pin Input High Voltage4

VIH,EXTAL

0.75*VDDPLL

T EXTAL Pin Input High Voltage4

VIH,EXTAL

VDDPLL + 0.3

P EXTAL Pin Input Low Voltage4

VIL,EXTAL

0.25*VDDPLL

T EXTAL Pin Input Low Voltage4

VIL,EXTAL

VSSPLL - 0.3

C EXTAL Pin Input Hysteresis4

VHYS,EXTAL

250

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