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© Andigilog, Inc. 2006
www.andigilog.com
October 2006 - 70A06010
aSC7621
Temperature Measurement Filtering
Filter Architecture
Each temperature reading is carefully filtered to remove spike transients and noise generated by the computer environment’s
effect on sensitive analog measurements. Filtering is tunable by the user and is applied in two general areas:
1.
Immediately after the measurement process before assigning a measurement to a Temperature Zone.
2.
After Temperature Zone assignment but before a fan is assigned to that Temperature Zone.
An overview of this signal flow is in Figure 6 below.
Figure 6 Measurement Filter Block Diagram
Spike & Smoothing Filter Algorithm
The Spike & Smoothing Filter algorithm has two phases of filtering. First, a “No-Spike” value is created from the current and
three previous values. The result is an average of the two remaining values when the high and low values are removed.
The second phase is a user specified filter and coefficient. This filter determines a smoothed temperature value, Smooth Ti,
by taking the No-Spike Ti, subtracting the previous smoothed temperature, Smooth Ti-1, divided by 2
N and adding that to the
previously smoothed temperature. N and GAIN are coefficients selected internally to provide the spike filter smoothing time
constants (step input response time) shown in Table 8, Table 9 and Table 23.
For the current temperature reading Ti:
No-Spike Ti = (Discard min and max of (Ti, Ti-1, Ti-2, Ti-3))/2
Smooth Ti = GAIN * (No-Spike Ti - Smooth Ti-1)/2
N + Smooth Ti-1
Status Registers
Register 41h: Interrupt Status Register 1
Register
Address
Read/
Write
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
41h
R
Interrupt Status 1
ERR
ZN3
ZN2
ZN1
5V
3.3V
VCCP
2.5V
N/A
The Interrupt Status Register 1 bits will be automatically set, by the aSC7621, whenever a fault condition is detected. A fault
condition is detected whenever a measured value is outside the window set by its limit registers. ZN1 bit will be set when a
diode fault condition, such as an open or short, is detected. More than one fault may be indicated in the interrupt register
when read. The register will hold set bit(s) until the event is read by software. The contents of this register will be cleared
(set to 0) automatically by the aSC7621 after it is read by software, if the fault condition no longer exists. Once set, the
Interrupt Status Register 1 bits will remain set until a read event occurs, even if the fault condition no longer exists. This
register is read-only – a write to this register has no effect.
Σ-Δ
Converter
PECI
Input
Spike &
Smoothing
Filter
(User Tuned)
Spike &
Smoothing
Filter
(User Tuned)
Up to 7
Temperature
Inputs into 4
Temperature
Zone
Assignments
and Limit
Evaluations
4 Zone to 3
Fan PWM
Assignments
Spike &
Smoothing
Filter
(User Tuned)
Fan Speed
Control
Two Remote Diodes
and Internal Diode
Up to 4 PECI
Addresses
Select
Maximum
From Each
PECI Address
Tuning: Register 36h bits 2:0, Table 8
Tuning: Register 0Eh bits 6:4, Table 9
Tuning: Register 62h bits 3:0,
Register 63h bits 7:4 and 3:0,
Register 3Ch bits 3:0, Table 23
Temperature
Zone 1-4
Reports
Filtered PECI
Reports
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