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© Andigilog, Inc. 2006
www.andigilog.com
October 2006 - 70A06010
aSC7621
Bit
Name
R/W
Default
Description
6
Remote Diode
1 Fault
R
0
The aSC7621 automatically sets this bit to 1 when there is an open circuit fault
on the Remote1+ or Remote1- thermal diode input pins. A diode fault will also
set bit 4 Zone 1 Limit bit, of Interrupt Status Register 1.
7
Remote Diode
2 Fault
R
0
The aSC7621 automatically sets this bit to 1 when there is an open circuit fault
on the Remote2+ or Remote2- thermal diode input pins. A diode fault will also
set bit 6 Zone 3 Limit bit, of Interrupt Status Register 1.
Table 13 Interrupt Status Register 2
Register 43h: Interrupt Status Register 3
Register
Address
Read/
Write
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
43h
R
Interrupt Status 3
RES
RES
RES
RES
ALOVR
COMM
DATA
ZN4
N/A
The Interrupt Status Register 3 bits will be automatically set, by the aSC7621, whenever a fault condition is detected.
Interrupt Status Register 3 identifies faults caused by Temperature Zone exceeding absolute limits, PECI Communication
Error, PECI Data Error and Zone 4 Temperature limit exceeded. Interrupt Status Register 3 will hold a set bit until the event
is read by software. The contents of this register will be cleared (set to 0) automatically by the aSC7621 after it is read by
software, if fault condition no longer exists. Once set, the Interrupt Status Register 3 bits will remain set until a read event
occurs, even if the fault no longer exists. This register is read only – a write to this register has no effect.
Bit
Name
R/W
Default
Description
0
ZN4
R
0
The aSC7621 automatically sets this bit to 1 when the Zone 4 Limit is
exceeded.
1
DATA
R
0
The aSC7621 sets this bit when any of the PECI Processor Status reports
PECI ERROR = 1 and PECI Underflow = 1, this indicates a Data error
occurred with a PECI processor.
2
COMM
R
0
The aSC7621 automatically sets this bit to 1 when any of the PECI Processor
Status reports PECI ERROR = 1 and PECI Underflow = 0 this indicates a
Communications error occurred with a PECI Processor.
3
ALOVR
R
0
The aSC7621 automatically sets this bit to 1 when any Temperature Zone
exceeds its Absolute Temperature Limit.
4
Reserved
R
0
Reserved.
5
Reserved
R
0
Reserved.
6
Reserved
R
0
Reserved.
7
Reserved
R
0
Reserved.
Table 14 Interrupt Status Register 3
Tachometer Measurement and Configuration
Register 28-2Fh: Fan Tachometer Reading
Register
Address
Read/
Write
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
28h
29h
R
R
Tach 1 LS Byte
Tach 1 MS Byte
7
15
6
14
5
13
4
12
3
11
2
10
1
9
0
8
N/A
N/A
2Ah
2Bh
R
R
Tach 2 LS Byte
Tach 2 MS Byte
7
15
6
14
5
13
4
12
3
11
2
10
1
9
0
8
N/A
N/A
2Ch
2Dh
R
R
Tach 3 LS Byte
Tach 3 MS Byte
7
15
6
14
5
13
4
12
3
11
2
10
1
9
0
8
N/A
N/A
2Eh
2Fh
R
R
Tach 4 LS Byte
Tach 4 MS Byte
7
15
6
14
5
13
4
12
3
11
2
10
1
9
0
8
N/A
N/A
The Fan Tachometer Reading registers contains the number of 11.111
μs periods (90 kHz) between full fan revolutions. The
results are based on the time interval of two tachometer pulses, since most fans produce two tachometer pulses per full
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