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SA1638 Datasheet(PDF) 2 Page - NXP Semiconductors |
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SA1638 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 26 page ![]() Philips Semiconductors Product specification SA1638 Low voltage IF I/Q transceiver 2 1997 Sept 03 853-1818 18351 DESCRIPTION The SA1638 is a combined Rx and Tx IF I/Q circuit. The receive path contains an IF amplifier, a pair of quadrature down-mixers, and a pair of baseband filters and amplifiers. A second pair of mixers in the transmit path transposes a quadrature baseband input up to the IF frequency. An external VCO signal is divided down internally and buffered to provide quadrature local oscillator signals for the mixers. A further divider chain, reference divider and phase detector are provided to avoid the need for an external IF synthesizer. Rx or Tx path or the entire circuit may be powered down by logic inputs. On-board voltage regulators are provided to allow direct connection to a battery supply. FEATURES • Direct supply: 3.3V to 7.5V • Two DC regulators giving 3.0V output • Low current consumption: 18mA for Rx or 22mA for Tx • Input/output IF frequency from 70-400 MHz • Internal IF PLL for synthesizing the local oscillator signal • High performance on-board integrated receive filters with bandwidth tunable between 50-850 kHz • Switchable alternative bandwidth setting available to allow channel bandwidth flexibility in operation • Designed for a widely used I and Q baseband GSM interface • Control registers power up in a default state • Optional DC offset trim capability to <200mV • Only a standard reference input frequency required, choice of 13, 26, 39 or 52MHz • Fully compatible with SA1620 GSM RF front-end (see Figure 9) APPLICATIONS • IF circuitry for GSM 900MHz hand-held units • IF circuitry for PCN (DCS1800) hand-held units • Quadrature up and down mixer stage PIN CONFIGURATION LQFP Package CLK IN CLK INX VEEDIG DATA VEECP IREF LO INX LO IN ADJ IN CLOCK VREG1 VREGF2 VREG2 GNDREG2 PON VBATT AOUT BOUT DCRES RESD 48–pin LQFP 45 46 47 48 1 2 3 4 5 6 7 13 14 15 16 17 18 19 25 26 27 28 29 30 42 43 44 31 32 33 34 35 36 20 21 22 23 24 8 9 10 11 12 39 40 41 37 38 RESA RESB STROBE LOCK SR00524 Figure 1. SA1638 Pin Configuration ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # 48-Pin Thin Quad Flat Pack (LQFP) -40 to +85 °C SA1638BE SOT313-2 |
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